- Delayed commit of code for the ASUS A7M motherboard
- VIA 686 cleanups from the A7M code (it now works in a different pci slot). - Update of assembly printing routines to use the debug levels: TTYS0_TX_CHAR now becomes CONSOLE_<LEVEL>_TX_CHAR. It's more verbose but now the controls are the same as with the C code. - Break off of loglevel.h from printk.h. loglevel.h is safe for both the assembly routines and the C code to include. - Next round of commits for the supermicro p4dc6 - SMP setup updates (Rons board is broken) I now allow the other SMP processors to report their existence. I really need to add a minimum time to run but that hasn't happened yet. - SMP per motherboard table of apicids, as the assumption that they would always be 0 & 1 with only two cpus fails. - RDRAM setup updates. The code isn't done but it now works on more than one board at a time. - More cacheram work. Minor bug fixes and some macros to use it from C. - Entry point changes so we no longer have to jump over our gdt. - Added/Audited the cpufixup for the i786 - IDE intialization for the 82801 ich2 chip.
This commit is contained in:
parent
7ca28e1b0f
commit
d96aab9e06
79 changed files with 2030 additions and 731 deletions
|
|
@ -7,6 +7,8 @@
|
|||
#ifdef CPU_FIXUP
|
||||
# if defined(k7)
|
||||
# define cpufixup(totalram) k7_cpufixup(totalram)
|
||||
# elif defined(i786)
|
||||
# define cpufixup(totalram) p6_cpufixup(totalram)
|
||||
# elif defined(i686)
|
||||
# define cpufixup(totalram) p6_cpufixup(totalram)
|
||||
# endif
|
||||
|
|
|
|||
|
|
@ -4,7 +4,7 @@
|
|||
#include <cpu/p6/l2_cache.h>
|
||||
|
||||
#ifdef CONFIGURE_L2_CACHE
|
||||
# if defined(i686)
|
||||
# if defined(i686) && !defined(i786)
|
||||
# define configure_l2_cache() p6_configure_l2_cache()
|
||||
# endif
|
||||
#else
|
||||
|
|
|
|||
|
|
@ -139,7 +139,7 @@ static inline void apic_wait_icr_idle(void)
|
|||
|
||||
#ifdef CONFIG_X86_GOOD_APIC
|
||||
# define FORCE_READ_AROUND_WRITE 0
|
||||
# define apic_read_around(x)
|
||||
# define apic_read_around(x) apic_read(x)
|
||||
# define apic_write_around(x,y) apic_write((x),(y))
|
||||
#else
|
||||
# define FORCE_READ_AROUND_WRITE 1
|
||||
|
|
@ -147,10 +147,11 @@ static inline void apic_wait_icr_idle(void)
|
|||
# define apic_write_around(x,y) apic_write_atomic((x),(y))
|
||||
#endif
|
||||
|
||||
static inline unsigned long apic_remote_read(int apicid, int reg)
|
||||
static inline int apic_remote_read(int apicid, int reg, unsigned long *pvalue)
|
||||
{
|
||||
int timeout;
|
||||
unsigned long status, result;
|
||||
unsigned long status;
|
||||
int result;
|
||||
apic_wait_icr_idle();
|
||||
apic_write_around(APIC_ICR2, SET_APIC_DEST_FIELD(apicid));
|
||||
apic_write_around(APIC_ICR, APIC_DM_REMRD | (reg >> 4));
|
||||
|
|
@ -164,10 +165,8 @@ static inline unsigned long apic_remote_read(int apicid, int reg)
|
|||
|
||||
result = -1;
|
||||
if (status == APIC_ICR_RR_VALID) {
|
||||
result = apic_read(APIC_RRR);
|
||||
}
|
||||
else {
|
||||
printk_err("remote apic read failed\n");
|
||||
*pvalue = apic_read(APIC_RRR);
|
||||
result = 0;
|
||||
}
|
||||
return result;
|
||||
}
|
||||
|
|
|
|||
Loading…
Add table
Add a link
Reference in a new issue