soc/mediatek/mt8189: Reserve DRAM buffers for HW TX TRACKING
HW TX tracking works by writing a pattern to the designated DRAM buffer and then reading it back automatically to calculate the appropriate TX time delay. To avoid writing the pattern to system-used memory, we need to permanently reserve last 64KB memory on each rank for the HW TX tracking feature. BUG=b:379008996 BRANCH=none TEST=Reserve memory ok Firmware shows the following log : 000000013fff0000-000000013fffffff: RESERVED 000000023fff0000-000000023fffffff: RESERVED Signed-off-by: Mike Lin <mike.lin@mediatek.corp-partner.google.com> Change-Id: I2ecfe42dc9f1882163d03f50cf9b5ff8e98c2972 Reviewed-on: https://review.coreboot.org/c/coreboot/+/87039 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Yidi Lin <yidilin@google.com>
This commit is contained in:
parent
b4f6e9a2ec
commit
d921e873b8
2 changed files with 8 additions and 0 deletions
|
|
@ -19,6 +19,7 @@ romstage-y += ../common/emi.c
|
|||
romstage-y += ../common/memory.c ../common/memory_test.c
|
||||
romstage-y += ../common/mmu_operations.c ../common/mmu_cmops.c
|
||||
|
||||
ramstage-y += ../common/dramc_info.c
|
||||
ramstage-y += ../common/emi.c
|
||||
ramstage-y += ../common/memory.c
|
||||
ramstage-y += ../common/mmu_operations.c ../common/mmu_cmops.c
|
||||
|
|
|
|||
|
|
@ -1,9 +1,16 @@
|
|||
/* SPDX-License-Identifier: GPL-2.0-only OR MIT */
|
||||
|
||||
#include <bootmem.h>
|
||||
#include <device/device.h>
|
||||
#include <soc/dramc_info.h>
|
||||
#include <soc/emi.h>
|
||||
#include <symbols.h>
|
||||
|
||||
void bootmem_platform_add_ranges(void)
|
||||
{
|
||||
reserve_buffer_for_dramc();
|
||||
}
|
||||
|
||||
static void soc_read_resources(struct device *dev)
|
||||
{
|
||||
ram_range(dev, 0, (uintptr_t)_dram, sdram_size());
|
||||
|
|
|
|||
Loading…
Add table
Add a link
Reference in a new issue