diff --git a/payloads/libpayload/configs/config.auron b/payloads/libpayload/configs/config.auron
index af101fb3d6..a794357a11 100644
--- a/payloads/libpayload/configs/config.auron
+++ b/payloads/libpayload/configs/config.auron
@@ -64,10 +64,10 @@ CONFIG_LP_NVRAM=y
 # CONFIG_LP_STORAGE is not set
 CONFIG_LP_TIMER_RDTSC=y
 CONFIG_LP_USB=y
-CONFIG_LP_USB_UHCI=y
-CONFIG_LP_USB_OHCI=y
-CONFIG_LP_USB_EHCI=y
-# CONFIG_LP_USB_XHCI is not set
+# CONFIG_LP_USB_UHCI is not set
+# CONFIG_LP_USB_OHCI is not set
+# CONFIG_LP_USB_EHCI is not set
+CONFIG_LP_USB_XHCI=y
 CONFIG_LP_USB_HID=y
 CONFIG_LP_USB_HUB=y
 CONFIG_LP_USB_MSC=y
diff --git a/src/mainboard/google/auron/Kconfig b/src/mainboard/google/auron/Kconfig
index 89e16c2222..79f0c2276a 100644
--- a/src/mainboard/google/auron/Kconfig
+++ b/src/mainboard/google/auron/Kconfig
@@ -20,6 +20,7 @@ config BOARD_SPECIFIC_OPTIONS # dummy
 	select CACHE_ROM
 	select MARK_GRAPHICS_MEM_WRCOMB
 	select MONOTONIC_TIMER_MSR
+	select MAINBOARD_HAS_NATIVE_VGA_INIT
 
 config VBOOT_RAMSTAGE_INDEX
 	hex
diff --git a/src/mainboard/google/auron/devicetree.cb b/src/mainboard/google/auron/devicetree.cb
index 4c0d02d662..7f18d60259 100644
--- a/src/mainboard/google/auron/devicetree.cb
+++ b/src/mainboard/google/auron/devicetree.cb
@@ -84,6 +84,9 @@ chip northbridge/intel/haswell
 			# Disable PCIe CLKOUT 2-5 and CLKOUT_XDP
 			register "icc_clock_disable" = "0x013c0000"
 
+			# Route all USB ports to XHCI per default
+			register "xhci_default" = "1"
+
 			device pci 13.0 off end # Smart Sound Audio DSP
 			device pci 14.0 on end # USB3 XHCI
 			device pci 15.0 on end # Serial I/O DMA