From d88e98cf49993c8fecd70137b7c68c64948ea167 Mon Sep 17 00:00:00 2001 From: Pranava Y N Date: Tue, 17 Feb 2026 17:04:47 +0530 Subject: [PATCH] mb/google/fatcat/lapis: Remove RTD3 config for SSD The lapis hardware design does not have a power load switch for the SSD. Without it, the platform cannot cut off the main power rail to the device to enter D3cold. Therefore, remove the RTD3 chip driver and its associated configurations in the overridetree to align with the hardware capability. The system will support D3hot instead of D3cold. BUG=None TEST=Build and boot to OS on Lapis, verify SSD functions correctly and power state transitions align with HW design. Change-Id: I61f15165e1d41c4f347499e2a7200f30d18bcca7 Signed-off-by: Pranava Y N Reviewed-on: https://review.coreboot.org/c/coreboot/+/91308 Tested-by: build bot (Jenkins) Reviewed-by: Subrata Banik --- src/mainboard/google/fatcat/variants/lapis/overridetree.cb | 5 ----- 1 file changed, 5 deletions(-) diff --git a/src/mainboard/google/fatcat/variants/lapis/overridetree.cb b/src/mainboard/google/fatcat/variants/lapis/overridetree.cb index a2da0752b0..6855616bb9 100644 --- a/src/mainboard/google/fatcat/variants/lapis/overridetree.cb +++ b/src/mainboard/google/fatcat/variants/lapis/overridetree.cb @@ -405,11 +405,6 @@ chip soc/intel/pantherlake .clk_req = 0, .flags = PCIE_RP_CLK_REQ_DETECT | PCIE_RP_LTR | PCIE_RP_AER, }" - chip soc/intel/common/block/pcie/rtd3 - register "is_storage" = "true" - register "srcclk_pin" = "0" - device generic 0 on end - end end # Gen4 SSD device ref cnvi_wifi on