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UPSTREAM: soc/intel/apollolake: correct GPIO 13 IRQ number

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The define for GPIO_13_IRQ had the wrong IRQ number. It should
be 0x70 instead of 0x6f.

BUG=chrome-os-partner:62085
BRANCH=reef
TEST=touch controller doesn't indicate continuous interrupts

Change-Id: Iab8992b08f0ee1a92d73cda1c730081b890c06da
Signed-off-by: Patrick Georgi <pgeorgi@chromium.org>
Original-Commit-Id: ba32f0f91c
Original-Change-Id: I3a0726db59fc1eb7736d348aecbf1082719f15b2
Original-Signed-off-by: Aaron Durbin <adurbin@chromium.org>
Original-Reviewed-on: https://review.coreboot.org/18190
Original-Reviewed-by: Furquan Shaikh <furquan@google.com>
Original-Tested-by: build bot (Jenkins)
Original-Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net>
Reviewed-on: https://chromium-review.googlesource.com/430615
Commit-Ready: Aaron Durbin <adurbin@chromium.org>
Tested-by: Aaron Durbin <adurbin@chromium.org>
Reviewed-by: Aaron Durbin <adurbin@chromium.org>
This commit is contained in:
Aaron Durbin 2017-01-20 14:10:26 -06:00 • committed by chrome-bot
commit d7cedd3f61
1 changed files with 1 additions and 1 deletions
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2
src/soc/intel/apollolake/include/soc/gpio_defs.h
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@ -506,7 +506,7 @@
#define GPIO_10_IRQ 0x6D
#define GPIO_11_IRQ 0x6E
#define GPIO_12_IRQ 0x6F
#define GPIO_13_IRQ 0x6F
#define GPIO_13_IRQ 0x70
#define GPIO_14_IRQ 0x71
#define GPIO_15_IRQ 0x72
#define GPIO_16_IRQ 0x73