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treewide: convert to tpm_result_t

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Convert TPM functions to return TPM error codes(referred to as
tpm_result_t) values to match the TCG standard.

BUG=b:296439237
TEST=build and boot to Skyrim
BRANCH=None

Change-Id: Ifdf9ff6c2a1f9b938dbb04d245799391115eb6b1
Signed-off-by: Jon Murphy <jpmurphy@google.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/77666
Reviewed-by: Raul Rangel <rrangel@chromium.org>
Reviewed-by: Matt DeVillier <matt.devillier@amd.corp-partner.google.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
This commit is contained in:
Jon Murphy 2023-09-05 11:36:43 -06:00 • committed by Raul Rangel
commit d7b8dc9cf5
44 changed files with 734 additions and 653 deletions
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5
src/mainboard/facebook/fbg1701/romstage.c
View file

@ -7,6 +7,7 @@
#if CONFIG(VENDORCODE_ELTAN_MBOOT)
#include <mboot.h>
#endif
#include <security/tpm/tss_errors.h>
#include <soc/lpc.h>
#include <soc/pci_devs.h>
#include <soc/romstage.h>
@ -71,9 +72,9 @@ static const uint8_t crtm_version[] =
CONFIG_VENDORCODE_ELTAN_CRTM_VERSION_STRING COREBOOT_VERSION COREBOOT_EXTRA_VERSION
" " COREBOOT_BUILD;
int mb_crtm(void)
tpm_result_t mb_crtm(void)
{
int rc = TPM_IOERROR;
tpm_result_t rc = TPM_IOERROR;
TCG_PCR_EVENT2_HDR tcgEventHdr;
/* Use FirmwareVersion string to represent CRTM version. */

4
src/mainboard/google/brya/mainboard.c
View file

@ -34,10 +34,10 @@ static void mainboard_smbios_strings(struct device *dev, struct smbios_type11 *t
void mainboard_update_soc_chip_config(struct soc_intel_alderlake_config *config)
{
int rc;
tpm_result_t rc;
rc = tlcl_lib_init();
if (rc != VB2_SUCCESS) {
if (rc != TPM_SUCCESS) {
printk(BIOS_ERR, "tlcl_lib_init() failed: %#x\n", rc);
return;
}

4
src/mainboard/google/dedede/mainboard.c
View file

@ -14,10 +14,10 @@
static void mainboard_update_soc_chip_config(void)
{
struct soc_intel_jasperlake_config *cfg = config_of_soc();
int rc;
tpm_result_t rc;
rc = tlcl_lib_init();
if (rc != VB2_SUCCESS) {
if (rc != TPM_SUCCESS) {
printk(BIOS_ERR, "tlcl_lib_init() failed: %#x\n", rc);
return;
}

4
src/mainboard/google/volteer/mainboard.c
View file

@ -82,7 +82,7 @@ static void mainboard_enable(struct device *dev)
void mainboard_update_soc_chip_config(struct soc_intel_tigerlake_config *cfg)
{
int rc;
tpm_result_t rc;
if (!CONFIG(TPM_GOOGLE_CR50) || !CONFIG(SPI_TPM)) {
/*
* Negotiation of long interrupt pulses is only supported via SPI. I2C is only
@ -94,7 +94,7 @@ void mainboard_update_soc_chip_config(struct soc_intel_tigerlake_config *cfg)
}
rc = tlcl_lib_init();
if (rc != VB2_SUCCESS) {
if (rc != TPM_SUCCESS) {
printk(BIOS_ERR, "tlcl_lib_init() failed: %#x\n", rc);
return;
}