diff --git a/src/mainboard/siemens/mc_rpl/include/baseboard/variants.h b/src/mainboard/siemens/mc_rpl/include/baseboard/variants.h
index bb2c3f62b0..e27b1773ba 100644
--- a/src/mainboard/siemens/mc_rpl/include/baseboard/variants.h
+++ b/src/mainboard/siemens/mc_rpl/include/baseboard/variants.h
@@ -34,6 +34,7 @@ void variant_configure_early_gpio_pads(void);
 size_t variant_memory_sku(void);
 const struct mb_cfg *variant_memory_params(void);
 void rpl_memory_params(FSPM_UPD *memupd);
+void variant_configure_fspm(FSPM_UPD *memupd);
 
 /* Modify devictree settings during ramstage */
 void variant_devtree_update(void);
diff --git a/src/mainboard/siemens/mc_rpl/romstage_fsp_params.c b/src/mainboard/siemens/mc_rpl/romstage_fsp_params.c
index 962b514d2f..0026821820 100644
--- a/src/mainboard/siemens/mc_rpl/romstage_fsp_params.c
+++ b/src/mainboard/siemens/mc_rpl/romstage_fsp_params.c
@@ -61,4 +61,6 @@ void mainboard_memory_init_params(FSPM_UPD *memupd)
 
 	if (CONFIG(GEN3_EXTERNAL_CLOCK_BUFFER))
 		configure_external_clksrc(m_cfg);
+
+	variant_configure_fspm(memupd);
 }
diff --git a/src/mainboard/siemens/mc_rpl/variants/mc_rpl1/Makefile.mk b/src/mainboard/siemens/mc_rpl/variants/mc_rpl1/Makefile.mk
index 45c478178a..248d22b18c 100644
--- a/src/mainboard/siemens/mc_rpl/variants/mc_rpl1/Makefile.mk
+++ b/src/mainboard/siemens/mc_rpl/variants/mc_rpl1/Makefile.mk
@@ -2,3 +2,4 @@
 
 bootblock-y += early_gpio.c
 ramstage-y += gpio.c
+romstage-y += variant.c
diff --git a/src/mainboard/siemens/mc_rpl/variants/mc_rpl1/variant.c b/src/mainboard/siemens/mc_rpl/variants/mc_rpl1/variant.c
new file mode 100644
index 0000000000..91f5cbd496
--- /dev/null
+++ b/src/mainboard/siemens/mc_rpl/variants/mc_rpl1/variant.c
@@ -0,0 +1,13 @@
+/* SPDX-License-Identifier: GPL-2.0-only */
+
+#include <console/console.h>
+#include <fsp/api.h>
+#include <baseboard/variants.h>
+
+void variant_configure_fspm(FSPM_UPD *memupd)
+{
+	FSP_M_CONFIG *m_cfg = &memupd->FspmConfig;
+
+	m_cfg->ActiveCoreCount = 4;
+	m_cfg->ActiveSmallCoreCount = 0;
+}