diff --git a/src/mainboard/google/auron/dsdt.asl b/src/mainboard/google/auron/dsdt.asl index 97de5cd2e6..697a8ee719 100644 --- a/src/mainboard/google/auron/dsdt.asl +++ b/src/mainboard/google/auron/dsdt.asl @@ -28,7 +28,7 @@ DefinitionBlock( Device (PCI0) { #include - #include + #include #include } } diff --git a/src/mainboard/google/jecht/dsdt.asl b/src/mainboard/google/jecht/dsdt.asl index 62c8b58fe6..a635ff4805 100644 --- a/src/mainboard/google/jecht/dsdt.asl +++ b/src/mainboard/google/jecht/dsdt.asl @@ -28,7 +28,7 @@ DefinitionBlock( Device (PCI0) { #include - #include + #include } } diff --git a/src/mainboard/hp/elitebook_820_g2/dsdt.asl b/src/mainboard/hp/elitebook_820_g2/dsdt.asl index 95012ce708..71267c539e 100644 --- a/src/mainboard/hp/elitebook_820_g2/dsdt.asl +++ b/src/mainboard/hp/elitebook_820_g2/dsdt.asl @@ -25,7 +25,7 @@ DefinitionBlock( Device (\_SB.PCI0) { #include - #include + #include #include } } diff --git a/src/mainboard/intel/wtm2/dsdt.asl b/src/mainboard/intel/wtm2/dsdt.asl index 764d442d5f..2d223e3c13 100644 --- a/src/mainboard/intel/wtm2/dsdt.asl +++ b/src/mainboard/intel/wtm2/dsdt.asl @@ -28,7 +28,7 @@ DefinitionBlock( Device (PCI0) { #include - #include + #include } } diff --git a/src/mainboard/purism/librem_bdw/dsdt.asl b/src/mainboard/purism/librem_bdw/dsdt.asl index 23d3df1280..5d203093bd 100644 --- a/src/mainboard/purism/librem_bdw/dsdt.asl +++ b/src/mainboard/purism/librem_bdw/dsdt.asl @@ -21,7 +21,7 @@ DefinitionBlock( Device (PCI0) { #include - #include + #include #include } } diff --git a/src/southbridge/intel/wildcatpoint/acpi/adsp.asl b/src/southbridge/intel/lynxpoint/acpi/adsp.asl similarity index 100% rename from src/southbridge/intel/wildcatpoint/acpi/adsp.asl rename to src/southbridge/intel/lynxpoint/acpi/adsp.asl diff --git a/src/southbridge/intel/lynxpoint/acpi/pch.asl b/src/southbridge/intel/lynxpoint/acpi/pch.asl index 7ac35d693f..8dd2c118f7 100644 --- a/src/southbridge/intel/lynxpoint/acpi/pch.asl +++ b/src/southbridge/intel/lynxpoint/acpi/pch.asl @@ -1,6 +1,12 @@ /* SPDX-License-Identifier: GPL-2.0-only */ -/* Intel Lynx Point PCH support */ +/* Intel Lynx Point and Wildcat Point PCH support */ + +/* TODO: Replace static routing info with runtime-generated SSDT */ +#if CONFIG(SOUTHBRIDGE_INTEL_WILDCATPOINT) +/* PCI IRQ assignment */ +#include "wpt_lp_pci_irqs.asl" +#endif #if CONFIG(INTEL_LYNXPOINT_LP) #define DEFAULT_PRW_VALUE 0x6d @@ -43,6 +49,14 @@ Scope (\) // High Definition Audio (Azalia) 0:1b.0 #include "audio.asl" +// TODO: Check if this also applies to Lynx Point-LP +#if CONFIG(SOUTHBRIDGE_INTEL_WILDCATPOINT) +#if CONFIG(INTEL_LYNXPOINT_LP) +// ADSP/SST 0:13.0 +#include "adsp.asl" +#endif +#endif + // PCI Express Ports 0:1c.x #include diff --git a/src/southbridge/intel/lynxpoint/acpi/serialio.asl b/src/southbridge/intel/lynxpoint/acpi/serialio.asl index 95a3466709..c9b215d8b1 100644 --- a/src/southbridge/intel/lynxpoint/acpi/serialio.asl +++ b/src/southbridge/intel/lynxpoint/acpi/serialio.asl @@ -5,6 +5,8 @@ // Serial IO Device BAR0 and BAR1 is 4KB #define SIO_BAR_LEN 0x1000 +// TODO: Replace this with some HAVE_DEVICE_NVS Kconfig +#if !CONFIG(SOUTHBRIDGE_INTEL_WILDCATPOINT) // This is defined in SSDT2 which is generated at boot based // on whether or not the device is enabled in ACPI mode. External (\S0EN) @@ -15,6 +17,7 @@ External (\S4EN) External (\S5EN) External (\S6EN) External (\S7EN) +#endif // Put SerialIO device in D0 state // Arg0 - Ref to offset 0x84 of device's PCI config space diff --git a/src/southbridge/intel/wildcatpoint/acpi/pci_irqs.asl b/src/southbridge/intel/lynxpoint/acpi/wpt_lp_pci_irqs.asl similarity index 100% rename from src/southbridge/intel/wildcatpoint/acpi/pci_irqs.asl rename to src/southbridge/intel/lynxpoint/acpi/wpt_lp_pci_irqs.asl diff --git a/src/southbridge/intel/wildcatpoint/acpi/gpio.asl b/src/southbridge/intel/wildcatpoint/acpi/gpio.asl deleted file mode 100644 index 48167bfae5..0000000000 --- a/src/southbridge/intel/wildcatpoint/acpi/gpio.asl +++ /dev/null @@ -1,126 +0,0 @@ -/* SPDX-License-Identifier: GPL-2.0-only */ - -Device (GPIO) -{ - // GPIO Controller - Method (_HID) - { - If (\ISWP ()) { - // WildcatPoint - Return ("INT3437") - } - - // LynxPoint-LP - Return ("INT33C7") - } - Name (_CID, "INT33C7") - Name (_UID, 1) - - Name (RBUF, ResourceTemplate () - { - DWordIo (ResourceProducer, - MinFixed, // IsMinFixed - MaxFixed, // IsMaxFixed - PosDecode, // Decode - EntireRange, // ISARanges - 0x00000000, // AddressGranularity - 0x00000000, // AddressMinimum - 0x00000000, // AddressMaximum - 0x00000000, // AddressTranslation - 0x00000000, // RangeLength - , // ResourceSourceIndex - , // ResourceSource - BAR0) - // Disabled due to IRQ storm: http://crosbug.com/p/29548 - //Interrupt (ResourceConsumer, - // Level, ActiveHigh, Shared, , , ) {14} - }) - - Method (_CRS, 0, NotSerialized) - { - CreateDwordField (^RBUF, ^BAR0._MIN, BMIN) - CreateDwordField (^RBUF, ^BAR0._MAX, BMAX) - CreateDwordField (^RBUF, ^BAR0._LEN, BLEN) - - BLEN = GPIO_BASE_SIZE - BMIN = GPIO_BASE_ADDRESS - BMAX = GPIO_BASE_ADDRESS + GPIO_BASE_SIZE - 1 - - Return (RBUF) - } - - Method (_STA, 0, NotSerialized) - { - Return (0xF) - } - - // GWAK: Setup GPIO as ACPI GPE for Wake - // Arg0: GPIO Number - Method (GWAK, 1, Serialized) - { - // Local0 = GPIO Base Address - Local0 = GPBS & ~1 - - // Local1 = BANK, Local2 = OFFSET - Local2 = Arg0 % 32 - Local1 = Arg0 / 32 - - // - // Set OWNER to ACPI - // - - // Local3 = GPIOBASE + GPIO_OWN(BANK) - Local3 = Local0 + (Local1 * 4) - - // GPIO_OWN(BANK) - OperationRegion (IOWN, SystemIO, Local3, 4) - Field (IOWN, AnyAcc, NoLock, Preserve) { - GOWN, 32, - } - - // GPIO_OWN[GPIO] = 0 (ACPI) - GOWN = GOWN & ~(1 << Local2) - - // - // Set ROUTE to SCI - // - - // Local3 = GPIOBASE + GPIO_ROUTE(BANK) - Local3 = Local0 + 0x30 + (Local1 * 4) - - // GPIO_ROUTE(BANK) - OperationRegion (IROU, SystemIO, Local3, 4) - Field (IROU, AnyAcc, NoLock, Preserve) { - GROU, 32, - } - - // GPIO_ROUTE[GPIO] = 0 (SCI) - GROU = GROU & ~(1 << Local2) - - // - // Set GPnCONFIG to GPIO|INPUT|INVERT - // - - // Local3 = GPIOBASE + GPnCONFIG0(GPIO) - Local3 = Local0 + 0x100 + (Arg0 * 8) - - // GPnCONFIG(GPIO) - OperationRegion (GPNC, SystemIO, Local3, 8) - Field (GPNC, AnyAcc, NoLock, Preserve) { - GMOD, 1, // MODE: 0=NATIVE 1=GPIO - , 1, - GIOS, 1, // IO_SEL: 0=OUTPUT 1=INPUT - GINV, 1, // INVERT: 0=NORMAL 1=INVERT - GLES, 1, // LxEB: 0=EDGE 1=LEVEL - , 24, - ILVL, 1, // INPUT: 0=LOW 1=HIGH - OLVL, 1, // OUTPUT: 0=LOW 1=HIGH - GPWP, 2, // PULLUP: 00=NONE 01=DOWN 10=UP 11=INVALID - ISEN, 1, // SENSE: 0=ENABLE 1=DISABLE - } - - GMOD = 1 // GPIO - GIOS = 1 // INPUT - GINV = 1 // INVERT - } -} diff --git a/src/southbridge/intel/wildcatpoint/acpi/lpc.asl b/src/southbridge/intel/wildcatpoint/acpi/lpc.asl deleted file mode 100644 index b6b77c8ed2..0000000000 --- a/src/southbridge/intel/wildcatpoint/acpi/lpc.asl +++ /dev/null @@ -1,180 +0,0 @@ -/* SPDX-License-Identifier: GPL-2.0-only */ - -#include - -// Intel LPC Bus Device - 0:1f.0 - -Device (LPCB) -{ - Name (_ADR, 0x001f0000) - - OperationRegion (LPC0, PCI_Config, 0, 0x100) - Field (LPC0, AnyAcc, NoLock, Preserve) - { - Offset (0x02), - PDID, 16, // Device ID - Offset (0x40), - PMBS, 16, // PMBASE - Offset (0x48), - GPBS, 16, // GPIOBASE - Offset (0x60), // Interrupt Routing Registers - PRTA, 8, - PRTB, 8, - PRTC, 8, - PRTD, 8, - Offset (0x68), - PRTE, 8, - PRTF, 8, - PRTG, 8, - PRTH, 8, - - Offset (0x80), // IO Decode Ranges - IOD0, 8, - IOD1, 8, - } - - #include - - #include "acpi/ec.asl" - - Device (DMAC) // DMA Controller - { - Name (_HID, EISAID ("PNP0200")) - Name (_CRS, ResourceTemplate () - { - IO (Decode16, 0x00, 0x00, 0x01, 0x20) - IO (Decode16, 0x81, 0x81, 0x01, 0x11) - IO (Decode16, 0x93, 0x93, 0x01, 0x0d) - IO (Decode16, 0xc0, 0xc0, 0x01, 0x20) - DMA (Compatibility, NotBusMaster, Transfer8_16) { 4 } - }) - } - - Device (FWH) // Firmware Hub - { - Name (_HID, EISAID ("INT0800")) - Name (_CRS, ResourceTemplate () - { - Memory32Fixed (ReadOnly, 0xff000000, 0x01000000) - }) - } - - Device (HPET) - { - Name (_HID, EISAID ("PNP0103")) - Name (_CID, 0x010CD041) - - Name (BUF0, ResourceTemplate () - { - Memory32Fixed (ReadOnly, HPET_BASE_ADDRESS, 0x400, FED0) - }) - - Method (_STA, 0) // Device Status - { - Return (\HPTS(HPTE)) - } - - Method (_CRS, 0, Serialized) // Current resources - { - If (HPTE) { - CreateDWordField (BUF0, \_SB.PCI0.LPCB.HPET.FED0._BAS, HPT0) - If (HPAS == 1) { - HPT0 = HPET_BASE_ADDRESS + 0x1000 - } - - If (HPAS == 2) { - HPT0 = HPET_BASE_ADDRESS + 0x2000 - } - - If (HPAS == 3) { - HPT0 = HPET_BASE_ADDRESS + 0x3000 - } - } - - Return (BUF0) - } - } - - Device (PIC) // 8259 Interrupt Controller - { - Name (_HID,EISAID ("PNP0000")) - Name (_CRS, ResourceTemplate () - { - IO (Decode16, 0x20, 0x20, 0x01, 0x02) - IO (Decode16, 0x24, 0x24, 0x01, 0x02) - IO (Decode16, 0x28, 0x28, 0x01, 0x02) - IO (Decode16, 0x2c, 0x2c, 0x01, 0x02) - IO (Decode16, 0x30, 0x30, 0x01, 0x02) - IO (Decode16, 0x34, 0x34, 0x01, 0x02) - IO (Decode16, 0x38, 0x38, 0x01, 0x02) - IO (Decode16, 0x3c, 0x3c, 0x01, 0x02) - IO (Decode16, 0xa0, 0xa0, 0x01, 0x02) - IO (Decode16, 0xa4, 0xa4, 0x01, 0x02) - IO (Decode16, 0xa8, 0xa8, 0x01, 0x02) - IO (Decode16, 0xac, 0xac, 0x01, 0x02) - IO (Decode16, 0xb0, 0xb0, 0x01, 0x02) - IO (Decode16, 0xb4, 0xb4, 0x01, 0x02) - IO (Decode16, 0xb8, 0xb8, 0x01, 0x02) - IO (Decode16, 0xbc, 0xbc, 0x01, 0x02) - IO (Decode16, 0x4d0, 0x4d0, 0x01, 0x02) - IRQNoFlags () { 2 } - }) - } - - Device (MATH) // FPU - { - Name (_HID, EISAID ("PNP0C04")) - Name (_CRS, ResourceTemplate () - { - IO (Decode16, 0xf0, 0xf0, 0x01, 0x01) - IRQNoFlags () { 13 } - }) - } - - Device (LDRC) // LPC device: Resource consumption - { - Name (_HID, EISAID ("PNP0C02")) - Name (_UID, 2) - - Name (RBUF, ResourceTemplate () - { - IO (Decode16, 0x2e, 0x2e, 0x1, 0x02) // First SuperIO - IO (Decode16, 0x4e, 0x4e, 0x1, 0x02) // Second SuperIO - IO (Decode16, 0x61, 0x61, 0x1, 0x01) // NMI Status - IO (Decode16, 0x63, 0x63, 0x1, 0x01) // CPU Reserved - IO (Decode16, 0x65, 0x65, 0x1, 0x01) // CPU Reserved - IO (Decode16, 0x67, 0x67, 0x1, 0x01) // CPU Reserved - IO (Decode16, 0x80, 0x80, 0x1, 0x01) // Port 80 Post - IO (Decode16, 0x92, 0x92, 0x1, 0x01) // CPU Reserved - IO (Decode16, 0xb2, 0xb2, 0x1, 0x02) // SWSMI - IO (Decode16, ACPI_BASE_ADDRESS, ACPI_BASE_ADDRESS, 0x1, 0xff) - }) - - Method (_CRS, 0, NotSerialized) - { - Return (RBUF) - } - } - - Device (RTC) // Real Time Clock - { - Name (_HID, EISAID ("PNP0B00")) - Name (_CRS, ResourceTemplate () - { - IO (Decode16, 0x70, 0x70, 1, 8) - }) - } - - Device (TIMR) // Intel 8254 timer - { - Name (_HID, EISAID ("PNP0100")) - Name (_CRS, ResourceTemplate () { - IO (Decode16, 0x40, 0x40, 0x01, 0x04) - IO (Decode16, 0x50, 0x50, 0x10, 0x04) - IRQNoFlags () {0} - }) - } - - #include "gpio.asl" - #include "acpi/superio.asl" -} diff --git a/src/southbridge/intel/wildcatpoint/acpi/pch.asl b/src/southbridge/intel/wildcatpoint/acpi/pch.asl deleted file mode 100644 index 5e1f7206d6..0000000000 --- a/src/southbridge/intel/wildcatpoint/acpi/pch.asl +++ /dev/null @@ -1,80 +0,0 @@ -/* SPDX-License-Identifier: GPL-2.0-only */ - -#include - -/* PCI IRQ assignment */ -#include "pci_irqs.asl" - -#define DEFAULT_PRW_VALUE 0x6d - -Scope (\) -{ - // Root Complex Register Block - OperationRegion (RCRB, SystemMemory, CONFIG_FIXED_RCBA_MMIO_BASE, CONFIG_RCBA_LENGTH) - Field (RCRB, DWordAcc, Lock, Preserve) - { - Offset (0x3404), // High Performance Timer Configuration - HPAS, 2, // Address Select - , 5, - HPTE, 1, // Address Enable - } - - /* - * Check PCH type - * Return 1 if PCH is WildcatPoint - * Return 0 if PCH is LynxPoint - */ - Method (ISWP) - { - Local0 = \_SB.PCI0.LPCB.PDID & 0xfff0 - If (Local0 == 0x9cc0) { - Return (1) - } Else { - Return (0) - } - } -} - -// High Definition Audio (Azalia) 0:1b.0 -#include - -// ADSP/SST 0:13.0 -#include "adsp.asl" - -// PCI Express Ports 0:1c.x -#include - -// USB EHCI 0:1d.0 -#include - -// USB XHCI 0:14.0 -#include "xhci.asl" - -// LPC Bridge 0:1f.0 -#include "lpc.asl" - -// SATA 0:1f.2 -#include - -// SMBus 0:1f.3 -#include - -// Serial IO -#include "serialio.asl" - -Method (_OSC, 4) -{ - /* Check for proper GUID */ - If (Arg0 == ToUUID ("33DB4D5B-1FF7-401C-9657-7441C03DD766")) - { - /* Let OS control everything */ - Return (Arg3) - } - Else - { - /* Unrecognized UUID */ - CreateDWordField (Arg3, 0, CDW1) - CDW1 |= 4 - Return (Arg3) - } -} diff --git a/src/southbridge/intel/wildcatpoint/acpi/serialio.asl b/src/southbridge/intel/wildcatpoint/acpi/serialio.asl deleted file mode 100644 index d28fb70930..0000000000 --- a/src/southbridge/intel/wildcatpoint/acpi/serialio.asl +++ /dev/null @@ -1,626 +0,0 @@ -/* SPDX-License-Identifier: GPL-2.0-only */ - -// Intel Serial IO Devices in ACPI Mode - -// Serial IO Device BAR0 and BAR1 is 4KB -#define SIO_BAR_LEN 0x1000 - -// Put SerialIO device in D0 state -// Arg0 - Ref to offset 0x84 of device's PCI config space -Method (LPD0, 1, Serialized) -{ - Arg0 = DeRefOf (Arg0) & 0xFFFFFFFC - Local0 = DeRefOf (Arg0) // Read back after writing - - // Use Local0 to avoid iasl warning: Method Local is set but never used - Local0 &= Ones -} - -// Put SerialIO device in D3 state -// Arg0 - Ref to offset 0x84 of device's PCI config space -Method (LPD3, 1, Serialized) -{ - Arg0 = DeRefOf (Arg0) | 0x3 - Local0 = DeRefOf (Arg0) // Read back after writing - - // Use Local0 to avoid iasl warning: Method Local is set but never used - Local0 &= Ones -} - -// Serial IO Resource Consumption for BAR1 -Device (SIOR) -{ - Name (_HID, EISAID ("PNP0C02")) - Name (_UID, 4) - - Name (RBUF, ResourceTemplate () - { - // Serial IO BAR1 (PCI config space) resources - Memory32Fixed (ReadWrite, 0x00000000, 0x00000000, B1D0) // SDMA - Memory32Fixed (ReadWrite, 0x00000000, 0x00000000, B1D1) // I2C0 - Memory32Fixed (ReadWrite, 0x00000000, 0x00000000, B1D2) // I2C1 - Memory32Fixed (ReadWrite, 0x00000000, 0x00000000, B1D3) // SPI0 - Memory32Fixed (ReadWrite, 0x00000000, 0x00000000, B1D4) // SPI1 - Memory32Fixed (ReadWrite, 0x00000000, 0x00000000, B1D5) // UART0 - Memory32Fixed (ReadWrite, 0x00000000, 0x00000000, B1D6) // UART1 - Memory32Fixed (ReadWrite, 0x00000000, 0x00000000, B1D7) // SDIO - }) - - // Update BAR1 address and length if set in NVS - Method (_CRS, 0, NotSerialized) - { - // SDMA - If (\S0B1 != 0) { - CreateDwordField (^RBUF, ^B1D0._BAS, B0AD) - CreateDwordField (^RBUF, ^B1D0._LEN, B0LN) - B0AD = \S0B1 - B0LN = SIO_BAR_LEN - } - - // I2C0 - If (\S1B1 != 0) { - CreateDwordField (^RBUF, ^B1D1._BAS, B1AD) - CreateDwordField (^RBUF, ^B1D1._LEN, B1LN) - B1AD = \S1B1 - B1LN = SIO_BAR_LEN - } - - // I2C1 - If (\S2B1 != 0) { - CreateDwordField (^RBUF, ^B1D2._BAS, B2AD) - CreateDwordField (^RBUF, ^B1D2._LEN, B2LN) - B2AD = \S2B1 - B2LN = SIO_BAR_LEN - } - - // SPI0 - If (\S3B1 != 0) { - CreateDwordField (^RBUF, ^B1D3._BAS, B3AD) - CreateDwordField (^RBUF, ^B1D3._LEN, B3LN) - B3AD = \S3B1 - B3LN = SIO_BAR_LEN - } - - // SPI1 - If (\S4B1 != 0) { - CreateDwordField (^RBUF, ^B1D4._BAS, B4AD) - CreateDwordField (^RBUF, ^B1D4._LEN, B4LN) - B4AD = \S4B1 - B4LN = SIO_BAR_LEN - } - - // UART0 - If (\S5B1 != 0) { - CreateDwordField (^RBUF, ^B1D5._BAS, B5AD) - CreateDwordField (^RBUF, ^B1D5._LEN, B5LN) - B5AD = \S5B1 - B5LN = SIO_BAR_LEN - } - - // UART1 - If (\S6B1 != 0) { - CreateDwordField (^RBUF, ^B1D6._BAS, B6AD) - CreateDwordField (^RBUF, ^B1D6._LEN, B6LN) - B6AD = \S6B1 - B6LN = SIO_BAR_LEN - } - - // SDIO - If (\S7B1 != 0) { - CreateDwordField (^RBUF, ^B1D7._BAS, B7AD) - CreateDwordField (^RBUF, ^B1D7._LEN, B7LN) - B7AD = \S7B1 - B7LN = SIO_BAR_LEN - } - - Return (RBUF) - } -} - -Device (SDMA) -{ - // Serial IO DMA Controller - Name (_HID, "INTL9C60") - Name (_UID, 1) - - // BAR0 is assigned during PCI enumeration and saved into NVS - Name (RBUF, ResourceTemplate () - { - Memory32Fixed (ReadWrite, 0x00000000, 0x00000000, BAR0) - Interrupt (ResourceConsumer, Level, ActiveLow, Shared, , , ) {7} - }) - - Method (_CRS, 0, NotSerialized) - { - // Update BAR0 address and length if set in NVS - If (\S0B0 != 0) { - CreateDwordField (^RBUF, ^BAR0._BAS, B0AD) - CreateDwordField (^RBUF, ^BAR0._LEN, B0LN) - B0AD = \S0B0 - B0LN = SIO_BAR_LEN - } - - Return (RBUF) - } - - Method (_STA, 0, NotSerialized) - { - If (\S0EN == 0) { - Return (0x0) - } Else { - Return (0xF) - } - } -} - -Device (I2C0) -{ - // Serial IO I2C0 Controller - Method (_HID) - { - If (\ISWP ()) { - // WildcatPoint - Return ("INT3432") - } - - // LynxPoint-LP - Return ("INT33C2") - } - Name (_CID, "INT33C2") - Name (_UID, 1) - - Name (SSCN, Package () { 432, 507, 30 }) - Name (FMCN, Package () { 72, 160, 30 }) - - // BAR0 is assigned during PCI enumeration and saved into NVS - Name (RBUF, ResourceTemplate () - { - Memory32Fixed (ReadWrite, 0x00000000, 0x00000000, BAR0) - Interrupt (ResourceConsumer, Level, ActiveLow, Shared, , , ) {7} - }) - - // DMA channels are only used if Serial IO DMA controller is enabled - Name (DBUF, ResourceTemplate () - { - FixedDMA (0x18, 4, Width32Bit, DMA1) // Tx - FixedDMA (0x19, 5, Width32Bit, DMA2) // Rx - }) - - Method (_CRS, 0, NotSerialized) - { - // Update BAR0 address and length if set in NVS - If (\S1B0 != 0) { - CreateDwordField (^RBUF, ^BAR0._BAS, B0AD) - CreateDwordField (^RBUF, ^BAR0._LEN, B0LN) - B0AD = \S1B0 - B0LN = SIO_BAR_LEN - } - - // Check if Serial IO DMA Controller is enabled - If (\_SB.PCI0.SDMA._STA != 0) { - Return (ConcatenateResTemplate (RBUF, DBUF)) - } Else { - Return (RBUF) - } - } - - Method (_STA, 0, NotSerialized) - { - If (\S1EN == 0) { - Return (0x0) - } Else { - Return (0xF) - } - } - - OperationRegion (SPRT, SystemMemory, \S1B1 + 0x84, 4) - Field (SPRT, DWordAcc, NoLock, Preserve) - { - SPCS, 32 - } - - Method (_PS0, 0, Serialized) - { - ^^LPD0 (RefOf (SPCS)) - } - - Method (_PS3, 0, Serialized) - { - ^^LPD3 (RefOf (SPCS)) - } -} - -Device (I2C1) -{ - // Serial IO I2C1 Controller - Method (_HID) - { - If (\ISWP ()) { - // WildcatPoint - Return ("INT3433") - } - - // LynxPoint-LP - Return ("INT33C3") - } - Name (_CID, "INT33C3") - Name (_UID, 1) - - Name (SSCN, Package () { 432, 507, 30 }) - Name (FMCN, Package () { 72, 160, 30 }) - - // BAR0 is assigned during PCI enumeration and saved into NVS - Name (RBUF, ResourceTemplate () - { - Memory32Fixed (ReadWrite, 0x00000000, 0x00000000, BAR0) - Interrupt (ResourceConsumer, Level, ActiveLow, Shared, , , ) {7} - }) - - // DMA channels are only used if Serial IO DMA controller is enabled - Name (DBUF, ResourceTemplate () - { - FixedDMA (0x1A, 6, Width32Bit, DMA1) // Tx - FixedDMA (0x1B, 7, Width32Bit, DMA2) // Rx - }) - - Method (_CRS, 0, NotSerialized) - { - // Update BAR0 address and length if set in NVS - If (\S2B0 != 0) { - CreateDwordField (^RBUF, ^BAR0._BAS, B0AD) - CreateDwordField (^RBUF, ^BAR0._LEN, B0LN) - B0AD = \S2B0 - B0LN = SIO_BAR_LEN - } - - // Check if Serial IO DMA Controller is enabled - If (\_SB.PCI0.SDMA._STA != 0) { - Return (ConcatenateResTemplate (RBUF, DBUF)) - } Else { - Return (RBUF) - } - } - - Method (_STA, 0, NotSerialized) - { - If (\S2EN == 0) { - Return (0x0) - } Else { - Return (0xF) - } - } - - OperationRegion (SPRT, SystemMemory, \S2B1 + 0x84, 4) - Field (SPRT, DWordAcc, NoLock, Preserve) - { - SPCS, 32 - } - - Method (_PS0, 0, Serialized) - { - ^^LPD0 (RefOf (SPCS)) - } - - Method (_PS3, 0, Serialized) - { - ^^LPD3 (RefOf (SPCS)) - } -} - -Device (SPI0) -{ - // Serial IO SPI0 Controller - Method (_HID) - { - If (\ISWP ()) { - // WildcatPoint - Return ("INT3430") - } - - // LynxPoint-LP - Return ("INT33C0") - } - Name (_CID, "INT33C0") - Name (_UID, 1) - - // BAR0 is assigned during PCI enumeration and saved into NVS - Name (RBUF, ResourceTemplate () - { - Memory32Fixed (ReadWrite, 0x00000000, 0x00000000, BAR0) - Interrupt (ResourceConsumer, Level, ActiveLow, Shared, , , ) {7} - }) - - Method (_CRS, 0, NotSerialized) - { - // Update BAR0 address and length if set in NVS - If (\S3B0 != 0) { - CreateDwordField (^RBUF, ^BAR0._BAS, B0AD) - CreateDwordField (^RBUF, ^BAR0._LEN, B0LN) - B0AD = \S3B0 - B0LN = SIO_BAR_LEN - } - - Return (RBUF) - } - - Method (_STA, 0, NotSerialized) - { - If (\S3EN == 0) { - Return (0x0) - } Else { - Return (0xF) - } - } - - OperationRegion (SPRT, SystemMemory, \S3B1 + 0x84, 4) - Field (SPRT, DWordAcc, NoLock, Preserve) - { - SPCS, 32 - } - - Method (_PS0, 0, Serialized) - { - ^^LPD0 (RefOf (SPCS)) - } - - Method (_PS3, 0, Serialized) - { - ^^LPD3 (RefOf (SPCS)) - } -} - -Device (SPI1) -{ - // Serial IO SPI1 Controller - Method (_HID) - { - If (\ISWP ()) { - // WildcatPoint - Return ("INT3431") - } - - // LynxPoint-LP - Return ("INT33C1") - } - Name (_CID, "INT33C1") - Name (_UID, 1) - - // BAR0 is assigned during PCI enumeration and saved into NVS - Name (RBUF, ResourceTemplate () - { - Memory32Fixed (ReadWrite, 0x00000000, 0x00000000, BAR0) - Interrupt (ResourceConsumer, Level, ActiveLow, Shared, , , ) {7} - }) - - // DMA channels are only used if Serial IO DMA controller is enabled - Name (DBUF, ResourceTemplate () - { - FixedDMA (0x10, 0, Width32Bit, DMA1) // Tx - FixedDMA (0x11, 1, Width32Bit, DMA2) // Rx - }) - - Method (_CRS, 0, NotSerialized) - { - // Update BAR0 address and length if set in NVS - If (\S4B0 != 0) { - CreateDwordField (^RBUF, ^BAR0._BAS, B0AD) - CreateDwordField (^RBUF, ^BAR0._LEN, B0LN) - B0AD = \S4B0 - B0LN = SIO_BAR_LEN - } - - // Check if Serial IO DMA Controller is enabled - If (\_SB.PCI0.SDMA._STA != 0) { - Return (ConcatenateResTemplate (RBUF, DBUF)) - } Else { - Return (RBUF) - } - } - - Method (_STA, 0, NotSerialized) - { - If (\S4EN == 0) { - Return (0x0) - } Else { - Return (0xF) - } - } - - OperationRegion (SPRT, SystemMemory, \S4B1 + 0x84, 4) - Field (SPRT, DWordAcc, NoLock, Preserve) - { - SPCS, 32 - } - - Method (_PS0, 0, Serialized) - { - ^^LPD0 (RefOf (SPCS)) - } - - Method (_PS3, 0, Serialized) - { - ^^LPD3 (RefOf (SPCS)) - } -} - -Device (UAR0) -{ - // Serial IO UART0 Controller - Method (_HID) - { - If (\ISWP ()) { - // WildcatPoint - Return ("INT3434") - } - - // LynxPoint-LP - Return ("INT33C4") - } - Name (_CID, "INT33C4") - Name (_UID, 1) - - // BAR0 is assigned during PCI enumeration and saved into NVS - Name (RBUF, ResourceTemplate () - { - Memory32Fixed (ReadWrite, 0x00000000, 0x00000000, BAR0) - Interrupt (ResourceConsumer, Level, ActiveLow, Shared, , , ) {13} - }) - - // DMA channels are only used if Serial IO DMA controller is enabled - Name (DBUF, ResourceTemplate () - { - FixedDMA (0x16, 2, Width32Bit, DMA1) // Tx - FixedDMA (0x17, 3, Width32Bit, DMA2) // Rx - }) - - Method (_CRS, 0, NotSerialized) - { - // Update BAR0 address and length if set in NVS - If (\S5B0 != 0) { - CreateDwordField (^RBUF, ^BAR0._BAS, B0AD) - CreateDwordField (^RBUF, ^BAR0._LEN, B0LN) - B0AD = \S5B0 - B0LN = SIO_BAR_LEN - } - - // Check if Serial IO DMA Controller is enabled - If (\_SB.PCI0.SDMA._STA != 0) { - Return (ConcatenateResTemplate (RBUF, DBUF)) - } Else { - Return (RBUF) - } - } - - Method (_STA, 0, NotSerialized) - { - If (\S5EN == 0) { - Return (0x0) - } Else { - Return (0xF) - } - } - - OperationRegion (SPRT, SystemMemory, \S5B1 + 0x84, 4) - Field (SPRT, DWordAcc, NoLock, Preserve) - { - SPCS, 32 - } - - Method (_PS0, 0, Serialized) - { - ^^LPD0 (RefOf (SPCS)) - } - - Method (_PS3, 0, Serialized) - { - ^^LPD3 (RefOf (SPCS)) - } -} - -Device (UAR1) -{ - // Serial IO UART1 Controller - Method (_HID) - { - If (\ISWP ()) { - // WildcatPoint - Return ("INT3435") - } - - // LynxPoint-LP - Return ("INT33C5") - } - Name (_CID, "INT33C5") - Name (_UID, 1) - - // BAR0 is assigned during PCI enumeration and saved into NVS - Name (RBUF, ResourceTemplate () - { - Memory32Fixed (ReadWrite, 0x00000000, 0x00000000, BAR0) - Interrupt (ResourceConsumer, Level, ActiveLow, Shared, , , ) {13} - }) - - Method (_CRS, 0, NotSerialized) - { - // Update BAR0 address and length if set in NVS - If (\S6B0 != 0) { - CreateDwordField (^RBUF, ^BAR0._BAS, B0AD) - CreateDwordField (^RBUF, ^BAR0._LEN, B0LN) - B0AD = \S6B0 - B0LN = SIO_BAR_LEN - } - - Return (RBUF) - } - - Method (_STA, 0, NotSerialized) - { - If (\S6EN == 0) { - Return (0x0) - } Else { - Return (0xF) - } - } - - OperationRegion (SPRT, SystemMemory, \S6B1 + 0x84, 4) - Field (SPRT, DWordAcc, NoLock, Preserve) - { - SPCS, 32 - } - - Method (_PS0, 0, Serialized) - { - ^^LPD0 (RefOf (SPCS)) - } - - Method (_PS3, 0, Serialized) - { - ^^LPD3 (RefOf (SPCS)) - } -} - -Device (SDIO) -{ - // Serial IO SDIO Controller - Method (_HID) - { - If (\ISWP ()) { - // WildcatPoint - Return ("INT3436") - } - - // LynxPoint-LP - Return ("INT33C6") - } - Name (_CID, "PNP0D40") - Name (_UID, 1) - - // BAR0 is assigned during PCI enumeration and saved into NVS - Name (RBUF, ResourceTemplate () - { - Memory32Fixed (ReadWrite, 0x00000000, 0x00000000, BAR0) - Interrupt (ResourceConsumer, Level, ActiveLow, Shared, , , ) {5} - }) - - Method (_CRS, 0, NotSerialized) - { - // Update BAR0 address and length if set in NVS - If (\S7B0 != 0) { - CreateDwordField (^RBUF, ^BAR0._BAS, B0AD) - CreateDwordField (^RBUF, ^BAR0._LEN, B0LN) - B0AD = \S7B0 - B0LN = SIO_BAR_LEN - } - - Return (RBUF) - } - - Method (_STA, 0, NotSerialized) - { - If (\S7EN == 0) { - Return (0x0) - } Else { - Return (0xF) - } - } -} diff --git a/src/southbridge/intel/wildcatpoint/acpi/xhci.asl b/src/southbridge/intel/wildcatpoint/acpi/xhci.asl deleted file mode 100644 index d040201e5b..0000000000 --- a/src/southbridge/intel/wildcatpoint/acpi/xhci.asl +++ /dev/null @@ -1,360 +0,0 @@ -/* SPDX-License-Identifier: GPL-2.0-only */ - -// XHCI Controller 0:14.0 - -Device (XHCI) -{ - Name (_ADR, 0x00140000) - - OperationRegion (XPRT, PCI_Config, 0, 0x100) - Field (XPRT, AnyAcc, NoLock, Preserve) - { - DVID, 16, - Offset (0x10), - , 16, - XMEM, 16, // MEM_BASE - Offset (0x40), - , 11, - SWAI, 1, - , 20, - Offset (0x44), - , 12, - SAIP, 2, - , 18, - Offset (0x74), - D0D3, 2, - , 6, - PMEE, 1, // PME_EN - , 6, - PMES, 1, // PME_STS - Offset (0xb0), - , 13, - MB13, 1, - MB14, 1, - Offset (0xd0), - PR2R, 32, // USB2PR - PR2M, 32, // USB2PRM - PR3R, 32, // USB3PR - PR3M, 32, // USB3PRM - } - - // Clear status bits - Method (LPCL, 0, Serialized) - { - OperationRegion (XREG, SystemMemory, ^XMEM << 16, 0x600) - Field (XREG, DWordAcc, Lock, Preserve) - { - Offset (0x510), // PORTSCNUSB3[0] - PSC0, 32, - Offset (0x520), // PORTSCNUSB3[1] - PSC1, 32, - Offset (0x530), // PORTSCNUSB3[2] - PSC2, 32, - Offset (0x540), // PORTSCNUSB3[3] - PSC3, 32, - } - -#define PSC_PORT_ENABLED (1 << 1) -#define PSC_PORT_CHANGE_BITS (0x7f << 17) - - // Port 0 - Local0 = PSC0 & ~PSC_PORT_ENABLED - PSC0 = Local0 | PSC_PORT_CHANGE_BITS - - // Port 1 - Local0 = PSC1 & ~PSC_PORT_ENABLED - PSC1 = Local0 | PSC_PORT_CHANGE_BITS - - // Port 2 - Local0 = PSC2 & ~PSC_PORT_ENABLED - PSC2 = Local0 | PSC_PORT_CHANGE_BITS - - // Port 3 - Local0 = PSC3 & ~PSC_PORT_ENABLED - PSC3 = Local0 | PSC_PORT_CHANGE_BITS - } - - Method (LPS0, 0, Serialized) - { - OperationRegion (XREG, SystemMemory, ^XMEM << 16, 0x600) - Field (XREG, DWordAcc, Lock, Preserve) - { - Offset (0x510), // PORTSCNUSB3 - , 5, - PLS1, 4, // [8:5] Port Link State - PPR1, 1, // [9] Port Power - , 7, - CSC1, 1, // [17] Connect Status Change - , 1, - WRC1, 1, // [19] Warm Port Reset Change - , 11, - WPR1, 1, // [31] Warm Port Reset - Offset (0x520), // PORTSCNUSB3 - , 5, - PLS2, 4, // [8:5] Port Link State - PPR2, 1, // [9] Port Power - , 7, - CSC2, 1, // [17] Connect Status Change - , 1, - WRC2, 1, // [19] Warm Port Reset Change - , 11, - WPR2, 1, // [31] Warm Port Reset - Offset (0x530), // PORTSCNUSB3 - , 5, - PLS3, 4, // [8:5] Port Link State - PPR3, 1, // [9] Port Power - , 7, - CSC3, 1, // [17] Connect Status Change - , 1, - WRC3, 1, // [19] Warm Port Reset Change - , 11, - WPR3, 1, // [31] Warm Port Reset - Offset (0x540), // PORTSCNUSB3 - , 5, - PLS4, 4, // [8:5] Port Link State - PPR4, 1, // [9] Port Power - , 7, - CSC4, 1, // [17] Connect Status Change - , 1, - WRC4, 1, // [19] Warm Port Reset Change - , 11, - WPR4, 1, // [31] Warm Port Reset - } - -#define PLS_POLLING 7 - - // Wait for all powered ports to finish polling - Local0 = 10 - While ((PPR1 == 1 && PLS1 == PLS_POLLING || PPR2 == 1 && PLS2 == PLS_POLLING) || - (PPR3 == 1 && PLS3 == PLS_POLLING || PPR4 == 1 && PLS4 == PLS_POLLING)) - { - If (Local0 == 0) { - Break - } - Local0-- - Stall (10) - } - - // For each USB3 Port: - // If port is disconnected (PLS=5 PP=1 CSC=0) - // 1) Issue warm reset (WPR=1) - // 2) Poll for warm reset complete (WRC=0) - // 3) Write 1 to port status to clear - - // Local# indicate if port is reset - Local1 = 0 - Local2 = 0 - Local3 = 0 - Local4 = 0 - -#define PLS_RX_DETECT 5 - - If (PLS1 == PLS_RX_DETECT && (CSC1 == 0 && PPR1 == 1)) { - WPR1 = 1 // Issue warm reset - Local1 = 1 - } - If (PLS2 == PLS_RX_DETECT && (CSC2 == 0 && PPR2 == 1)) { - WPR2 = 1 // Issue warm reset - Local2 = 1 - } - If (PLS3 == PLS_RX_DETECT && (CSC3 == 0 && PPR3 == 1)) { - WPR3 = 1 // Issue warm reset - Local3 = 1 - } - If (PLS4 == PLS_RX_DETECT && (CSC4 == 0 && PPR4 == 1)) { - WPR4 = 1 // Issue warm reset - Local4 = 1 - } - - // Poll for warm reset complete on all ports that were reset - Local0 = 10 - While ((Local1 == 1 && WRC1 == 0 || Local2 == 1 && WRC2 == 0) || - (Local3 == 1 && WRC3 == 0 || Local4 == 1 && WRC4 == 0)) - { - If (Local0 == 0) { - Break - } - Local0-- - Stall (10) - } - - // Clear status bits in all ports - LPCL () - } - - Method (_PSC, 0, NotSerialized) - { - Return (^D0D3) - } - - Method (_PS0, 0, Serialized) - { - If (^DVID == 0xFFFF) { - Return () - } - If (^XMEM == 0xFFFF || ^XMEM == 0) { - Return () - } - - OperationRegion (XREG, SystemMemory, (^XMEM << 16) + 0x8000, 0x200) - Field (XREG, DWordAcc, Lock, Preserve) - { - Offset (0x0e0), // AUX Reset Control 1 - , 15, - AX15, 1, - Offset (0x154), // AUX Domain PM Control Register 2 - , 31, - CLK2, 1, - Offset (0x16c), // AUX Clock Control - , 2, - CLK0, 1, - , 11, - CLK1, 1, // USB3 Port Aux/Core Clock Gating Enable - } - - // If device is in D3, set back to D0 - Local0 = ^D0D3 - if (Local0 == 3) { - ^D0D3 = 0 - } - - If (!\ISWP()) { - // Clear PCI 0xB0[14:13] - ^MB13 = 0 - ^MB14 = 0 - - // Clear MMIO 0x816C[14,2] - CLK0 = 0 - CLK1 = 0 - - // Set MMIO 0x8154[31] - CLK2 = 1 - - // Handle per-port reset if needed - LPS0 () - - // Set MMIO 0x80e0[15] - AX15 = 1 - - // Clear PCI CFG offset 0x40[11] - ^SWAI = 0 - - // Clear PCI CFG offset 0x44[13:12] - ^SAIP = 0 - } - - Return () - } - - Method (_PS3, 0, Serialized) - { - If (^DVID == 0xFFFF) { - Return () - } - If (^XMEM == 0xFFFF || ^XMEM == 0) { - Return () - } - - OperationRegion (XREG, SystemMemory, (^XMEM << 16) + 0x8000, 0x200) - Field (XREG, DWordAcc, Lock, Preserve) - { - Offset (0x0e0), // AUX Reset Control 1 - , 15, - AX15, 1, - Offset (0x154), // AUX Domain PM Control Register 2 - , 31, - CLK2, 1, - Offset (0x16c), // AUX Clock Control - , 2, - CLK0, 1, - , 11, - CLK1, 1, // USB3 Port Aux/Core Clock Gating Enable - } - - ^PMES = 1 // Clear PME Status - ^PMEE = 1 // Enable PME - - // If device is in D3, set back to D0 - Local0 = ^D0D3 - if (Local0 == 3) { - ^D0D3 = 0 - } - - If (!\ISWP()) { - // Set PCI 0xB0[14:13] - ^MB13 = 1 - ^MB14 = 1 - - // Set MMIO 0x816C[14,2] - CLK0 = 1 - CLK1 = 1 - - // Clear MMIO 0x8154[31] - CLK2 = 0 - - // Clear MMIO 0x80e0[15] - AX15 = 0 - - // Set PCI CFG offset 0x40[11] - ^SWAI = 1 - - // Set PCI CFG offset 0x44[13:12] - ^SAIP = 1 - } - - // Put device in D3 - ^D0D3 = 3 - - Return () - } - - Name (_PRW, Package (){ 0x6d, 3 }) - - // Leave USB ports on for to allow Wake from USB - - Method (_S3D, 0) // Highest D State in S3 State - { - Return (3) - } - - Method (_S4D, 0) // Highest D State in S4 State - { - Return (3) - } - - Device (HUB7) - { - Name (_ADR, 0) - - // GPLD: Generate Port Location Data (PLD) - Method (GPLD, 1, Serialized) { - Local0 = Package () { - Buffer (0x10) {} - } - - // REV: Revision 2 for ACPI 5.0 - CreateField (DerefOf (Local0[0]), 0, 7, REV) - REV = 2 - - // VISI: Port visibility to user per port - CreateField (DerefOf (Local0[0]), 0x40, 1, VISI) - VISI = Arg0 - Return (Local0) - } - - Device (PRT1) { Name (_ADR, 1) } // USB Port 0 - Device (PRT2) { Name (_ADR, 2) } // USB Port 1 - Device (PRT3) { Name (_ADR, 3) } // USB Port 2 - Device (PRT4) { Name (_ADR, 4) } // USB Port 3 - Device (PRT5) { Name (_ADR, 5) } // USB Port 4 - Device (PRT6) { Name (_ADR, 6) } // USB Port 5 - Device (PRT7) { Name (_ADR, 7) } // USB Port 6 - Device (PRT8) { Name (_ADR, 8) } // USB Port 7 - Device (SSP1) { Name (_ADR, 10) } // USB Port 10 - Device (SSP2) { Name (_ADR, 11) } // USB Port 11 - Device (SSP3) { Name (_ADR, 12) } // USB Port 12 - Device (SSP4) { Name (_ADR, 13) } // USB Port 13 - Device (SSP5) { Name (_ADR, 14) } // USB Port 14 - Device (SSP6) { Name (_ADR, 15) } // USB Port 15 - } -}