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UPSTREAM: mb/lenovo/*00: Remove Roda/RK9 specific code

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BUG=None
BRANCH=None
TEST=None

Signed-off-by: Nico Huber <nico.h@gmx.de>
Reviewed-on: https://review.coreboot.org/17786
Tested-by: build bot (Jenkins)
Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net>
Reviewed-by: Kysti Mlkki <kyosti.malkki@gmail.com>

Change-Id: Iacf2e1c0b8003a3588ccbf79e17500ed12f39503
Reviewed-on: https://chromium-review.googlesource.com/419633
Commit-Ready: Furquan Shaikh <furquan@chromium.org>
Tested-by: Furquan Shaikh <furquan@chromium.org>
Reviewed-by: Aaron Durbin <adurbin@chromium.org>
This commit is contained in:
Nico Huber 2016-12-10 18:12:33 +01:00 • committed by chrome-bot
commit d5a3856dc4
2 changed files with 0 additions and 90 deletions
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45
src/mainboard/lenovo/t400/smihandler.c
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@ -1,45 +0,0 @@
/*
* This file is part of the coreboot project.
*
* Copyright (C) 2008-2009 coresystems GmbH
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
* the Free Software Foundation; version 2 of the License.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*/
#include <arch/io.h>
#include <console/console.h>
#include <cpu/x86/smm.h>
#include <southbridge/intel/i82801ix/nvs.h>
#include <southbridge/intel/i82801ix/i82801ix.h>
#include <ec/acpi/ec.h>
void mainboard_smi_gpi(u32 gpi_sts)
{
if (gpi_sts & (1 << 1)) {
printk(BIOS_DEBUG, "EC/SMI\n");
/* TODO */
}
}
int mainboard_smi_apmc(u8 apmc)
{
switch (apmc) {
case APM_CNT_ACPI_ENABLE:
send_ec_command(0x05); /* Set_SMI_Disable */
send_ec_command(0xaa); /* Set_ACPI_Enable */
break;
case APM_CNT_ACPI_DISABLE:
send_ec_command(0x04); /* Set_SMI_Enable */
send_ec_command(0xab); /* Set_ACPI_Disable */
break;
}
return 0;
}

45
src/mainboard/lenovo/x200/smihandler.c
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@ -1,45 +0,0 @@
/*
* This file is part of the coreboot project.
*
* Copyright (C) 2008-2009 coresystems GmbH
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
* the Free Software Foundation; version 2 of the License.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*/
#include <arch/io.h>
#include <console/console.h>
#include <cpu/x86/smm.h>
#include <southbridge/intel/i82801ix/nvs.h>
#include <southbridge/intel/i82801ix/i82801ix.h>
#include <ec/acpi/ec.h>
void mainboard_smi_gpi(u32 gpi_sts)
{
if (gpi_sts & (1 << 1)) {
printk(BIOS_DEBUG, "EC/SMI\n");
/* TODO */
}
}
int mainboard_smi_apmc(u8 apmc)
{
switch (apmc) {
case APM_CNT_ACPI_ENABLE:
send_ec_command(0x05); /* Set_SMI_Disable */
send_ec_command(0xaa); /* Set_ACPI_Enable */
break;
case APM_CNT_ACPI_DISABLE:
send_ec_command(0x04); /* Set_SMI_Enable */
send_ec_command(0xab); /* Set_ACPI_Disable */
break;
}
return 0;
}