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mb/google/rauru: Add PCIe domain support

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Add PCIe domain support.

TEST=Build pass, show pcie init pass log:
mtk_pcie_domain_enable: PCIe link up success (1)
BUG=b:317009620

Signed-off-by: Jianjun Wang <jianjun.wang@mediatek.com>
Change-Id: I3e06dfaf79924cd5352348afaa526fc7dedbb540
Reviewed-on: https://review.coreboot.org/c/coreboot/+/84700
Reviewed-by: Yidi Lin <yidilin@google.com>
Reviewed-by: Yu-Ping Wu <yupingso@google.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
This commit is contained in:
Jianjun Wang 2024-04-17 10:53:29 +08:00 • committed by Yu-Ping Wu
commit d1f9d73efc
1 changed files with 19 additions and 0 deletions
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19
src/mainboard/google/rauru/devicetree.cb
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@ -2,4 +2,23 @@
chip soc/mediatek/mt8196
device cpu_cluster 0 on end
device domain 0 on
register "pcie_config" = "{
.base = 0x16940000,
.mmio_res_io = {
.cpu_addr = 0x58000000,
.pci_addr = 0x58000000,
.size = 16 * MiB,
.type = IORESOURCE_IO,
},
.mmio_res_mem = {
.cpu_addr = 0x59000000,
.pci_addr = 0x59000000,
.size = 64 * MiB,
.type = IORESOURCE_MEM,
},
}"
device pci 00.0 on end # - Host Bridge
end
end