diff --git a/src/mainboard/google/fatcat/variants/baseboard/fatcat/devicetree.cb b/src/mainboard/google/fatcat/variants/baseboard/fatcat/devicetree.cb
index b09f9e324b..f9c79adc8f 100644
--- a/src/mainboard/google/fatcat/variants/baseboard/fatcat/devicetree.cb
+++ b/src/mainboard/google/fatcat/variants/baseboard/fatcat/devicetree.cb
@@ -62,6 +62,23 @@ chip soc/intel/pantherlake
 	# Enable Energy Reporting
 	register "pch_pm_energy_report_enable" = "true"
 
+	# As per document 813278, the Intel PTL-U 15W SoC supports
+	# Fast V-Mode (FVM) on cores (IA), Graphics (GT), and System
+	# Agent (SA). The ICC Limit is represented in 1/4 A
+	# increments, i.e., a value of 400 = 100A.
+	# IA VR configuration
+	register "enable_fast_vmode[VR_DOMAIN_IA]" = "true"
+	register "cep_enable[VR_DOMAIN_IA]" = "true"
+	register "fast_vmode_i_trip[VR_DOMAIN_IA]" = "252" # 63A
+	# GT VR configuration
+	register "enable_fast_vmode[VR_DOMAIN_GT]" = "true"
+	register "cep_enable[VR_DOMAIN_GT]" = "true"
+	register "fast_vmode_i_trip[VR_DOMAIN_GT]" = "152" # 38A
+	# SA VR configuration
+	register "enable_fast_vmode[VR_DOMAIN_SA]" = "true"
+	register "cep_enable[VR_DOMAIN_SA]" = "true"
+	register "fast_vmode_i_trip[VR_DOMAIN_SA]" = "152" # 38A
+
 	# Enable CNVi BT
 	register "cnvi_bt_core" = "true"