diff --git a/src/soc/intel/tigerlake/Kconfig b/src/soc/intel/tigerlake/Kconfig index a470d7cde5..192444ec11 100644 --- a/src/soc/intel/tigerlake/Kconfig +++ b/src/soc/intel/tigerlake/Kconfig @@ -75,6 +75,7 @@ config SOC_INTEL_TIGERLAKE select SOC_INTEL_COMMON_FEATURE select SOC_INTEL_COMMON_FEATURE_ESPI select SOC_INTEL_COMMON_FEATURE_GSPI_DEVFN + select SOC_INTEL_COMMON_FEATURE_SMIHANDLER select SOC_INTEL_COMMON_FEATURE_SOUNDWIRE select SOC_INTEL_COMMON_FEATURE_SPI_DEVFN select SOC_INTEL_COMMON_FEATURE_SPI_DEVFN_PSF diff --git a/src/soc/intel/tigerlake/Makefile.mk b/src/soc/intel/tigerlake/Makefile.mk index cf6cdc2ec2..5caff77277 100644 --- a/src/soc/intel/tigerlake/Makefile.mk +++ b/src/soc/intel/tigerlake/Makefile.mk @@ -38,7 +38,6 @@ ramstage-$(CONFIG_SOC_INTEL_CRASHLOG) += crashlog_lib.c smm-y += p2sb.c smm-y += pmutil.c -smm-y += smihandler.c smm-y += elog.c smm-y += xhci.c diff --git a/src/soc/intel/tigerlake/include/soc/pci_devs.h b/src/soc/intel/tigerlake/include/soc/pci_devs.h index 2f36bd159c..8b49773354 100644 --- a/src/soc/intel/tigerlake/include/soc/pci_devs.h +++ b/src/soc/intel/tigerlake/include/soc/pci_devs.h @@ -250,6 +250,7 @@ #define PCI_DEVFN_UART1 PCH_DEVFN_UART1 #define PCI_DEVFN_UART2 PCH_DEVFN_UART2 #define SOC_GSPI_DEVFN(n) PCH_DEVFN_GSPI##n +#define SOC_PMC_DEV PCH_DEV_PMC #endif diff --git a/src/soc/intel/tigerlake/smihandler.c b/src/soc/intel/tigerlake/smihandler.c deleted file mode 100644 index e1fc5a03ad..0000000000 --- a/src/soc/intel/tigerlake/smihandler.c +++ /dev/null @@ -1,30 +0,0 @@ -/* SPDX-License-Identifier: GPL-2.0-only */ - -#include -#include -#include -#include -#include - -int smihandler_soc_disable_busmaster(pci_devfn_t dev) -{ - /* Skip disabling PMC bus master to keep IO decode enabled */ - if (dev == PCH_DEV_PMC) - return 0; - return 1; -} - -const smi_handler_t southbridge_smi[SMI_STS_BITS] = { - [SMI_ON_SLP_EN_STS_BIT] = smihandler_southbridge_sleep, - [APM_STS_BIT] = smihandler_southbridge_apmc, - [PM1_STS_BIT] = smihandler_southbridge_pm1, - [GPE0_STS_BIT] = smihandler_southbridge_gpe0, - [GPIO_STS_BIT] = smihandler_southbridge_gpi, - [ESPI_SMI_STS_BIT] = smihandler_southbridge_espi, - [MCSMI_STS_BIT] = smihandler_southbridge_mc, -#if CONFIG(SOC_INTEL_COMMON_BLOCK_SMM_TCO_ENABLE) - [TCO_STS_BIT] = smihandler_southbridge_tco, -#endif - [PERIODIC_STS_BIT] = smihandler_southbridge_periodic, - [MONITOR_STS_BIT] = smihandler_southbridge_monitor, -};