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UPSTREAM: soc/intel/apollolake: Update SPI memory mapping constraints

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MMIO region of 256 KiB under 4 GiB is not decoded by SPI controller
by hardware design. Current code incorrectly specifies size of that
region to be 128 KiB. This change corrects the value to 256 KiB.

Change-Id: Idcc67eb3565b800d835e75c0b765dd49d1656938
Original-Signed-off-by: Andrey Petrov <andrey.petrov@intel.com>
Original-Reviewed-on: https://review.coreboot.org/14979
Original-Reviewed-by: Aaron Durbin <adurbin@chromium.org>
(cherry-picked from commit 204af8157d)
Signed-off-by: Martin Roth <martinroth@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/348409
Reviewed-by: Furquan Shaikh <furquan@chromium.org>
This commit is contained in:
Andrey Petrov 2016-05-26 15:29:15 -07:00 • committed by chrome-bot
commit cfd135fbd3
1 changed files with 2 additions and 2 deletions
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4
src/soc/intel/apollolake/mmap_boot.c
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@ -23,8 +23,8 @@
#include <fmap.h>
#include <soc/intel/common/nvm.h>
/* The 128 KiB right below 4G are decoded by readonly SRAM, not boot media */
#define IFD_BIOS_MAX_MAPPED (CONFIG_IFD_BIOS_END - 128 * KiB)
/* The 256 KiB right below 4G are decoded by readonly SRAM, not boot media */
#define IFD_BIOS_MAX_MAPPED (CONFIG_IFD_BIOS_END - 256 * KiB)
#define IFD_MAPPED_SIZE (IFD_BIOS_MAX_MAPPED - CONFIG_IFD_BIOS_START)
#define IFD_BIOS_SIZE (CONFIG_IFD_BIOS_END - CONFIG_IFD_BIOS_START)