erebion/coreboot
1
0
Fork 0
Code Issues Pull requests Projects Releases Packages Wiki Activity Actions

Ron,

Browse source 
Attached is the third revision of the CN400/EPIA-N(L) patch for CB V2.

Patch should work against r4381 (or later ?)

This version now boots all of the way through to attempting to launch a
payload (I'm trying FILO right now), where it falls over with exception
6 (invalid opcode)

The coreboot_table issue seems to have been automagically resolved by
the latest core files.

It may still be that the reason for the payload not starting is down to
some issue with the tables initialising, I'll look closer at that.

Signed-off-by: Jon Harrison <bothlyn@blueyonder.co.uk>

Acked-by: Ronald G. Minnich <rminnich@gmail.com>



git-svn-id: svn://svn.coreboot.org/coreboot/trunk@4386 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
This commit is contained in:
Jon Harrison 2009-07-01 10:57:25 +00:00 • committed by Ronald G. Minnich
commit cfb9cd2f8a
26 changed files with 3855 additions and 0 deletions
Download patch file Download diff file Expand all files Collapse all files

5
src/config/Options.lb
View file

@ -568,6 +568,11 @@ define CONFIG_MAX_PCI_BUSES
export always
comment "Maximum number of PCI buses to search for devices"
end
define CONFIG_EPIA_VT8237R_INIT
default none
export used
comment "Enable EPIA Specific Initialisation of VT8237R SB"
end
###############################################
# SMP options
###############################################