diff --git a/src/soc/mediatek/mt8189/Makefile.mk b/src/soc/mediatek/mt8189/Makefile.mk index 0a5a652d92..8eda710cc2 100644 --- a/src/soc/mediatek/mt8189/Makefile.mk +++ b/src/soc/mediatek/mt8189/Makefile.mk @@ -15,6 +15,7 @@ bootblock-y += efuse.c bootblock-y += ../common/lastbus_v2.c lastbus.c bootblock-y += ../common/mmu_operations.c bootblock-y += ../common/mtcmos.c mtcmos.c +bootblock-y += ../common/tracker_v3.c tracker.c bootblock-y += ../common/wdt.c ../common/wdt_req.c wdt.c romstage-y += ../common/cbmem.c diff --git a/src/soc/mediatek/mt8189/bootblock.c b/src/soc/mediatek/mt8189/bootblock.c index adf3938187..c410ce1493 100644 --- a/src/soc/mediatek/mt8189/bootblock.c +++ b/src/soc/mediatek/mt8189/bootblock.c @@ -5,11 +5,13 @@ #include #include #include +#include #include void bootblock_soc_init(void) { mtk_mmu_init(); + bustracker_init(); lastbus_init(); mtk_wdt_init(); mt_pll_init(); diff --git a/src/soc/mediatek/mt8189/include/soc/addressmap.h b/src/soc/mediatek/mt8189/include/soc/addressmap.h index abc9f972f0..d6a464d68e 100644 --- a/src/soc/mediatek/mt8189/include/soc/addressmap.h +++ b/src/soc/mediatek/mt8189/include/soc/addressmap.h @@ -9,6 +9,7 @@ enum { MCUPM_SRAM_BASE = 0x0C540000, MCUPM_CFG_BASE = 0x0C580000, DBGAO_BASE = 0x0D01A000, + BUS_TRACE_MONITOR_BASE = 0x0D040000, DEM_BASE = 0x0D0A0000, IO_PHYS = 0x10000000, }; @@ -38,11 +39,13 @@ enum { DEVAPC_INFRA_AO_BASE = IO_PHYS + 0x00030000, DEVAPC_INFRA_AO1_BASE = IO_PHYS + 0x00034000, EMISYS_NAO_DEBUG_BASE = IO_PHYS + 0x00042000, + AP_TRACKER_BASE = IO_PHYS + 0x00208000, INFRACFG_BASE = IO_PHYS + 0x0020E000, EMI0_BASE = IO_PHYS + 0x00219000, EMI0_MPU_BASE = IO_PHYS + 0x00226000, DRAMC_CHA_AO_BASE = IO_PHYS + 0x00230000, EMICFG_AO_MEM_BASE = IO_PHYS + 0x00270000, + INFRA_TRACKER_BASE = IO_PHYS + 0x00314000, THERM_CTRL_BASE = IO_PHYS + 0x00315000, DPM_PM_SRAM_BASE = IO_PHYS + 0x00900000, DPM_DM_SRAM_BASE = IO_PHYS + 0x00920000, diff --git a/src/soc/mediatek/mt8189/include/soc/tracker.h b/src/soc/mediatek/mt8189/include/soc/tracker.h new file mode 100644 index 0000000000..a3c836ed79 --- /dev/null +++ b/src/soc/mediatek/mt8189/include/soc/tracker.h @@ -0,0 +1,24 @@ +/* SPDX-License-Identifier: GPL-2.0-only OR MIT */ + +#ifndef SOC_MEDIATEK_MT8189_TRACKER_H +#define SOC_MEDIATEK_MT8189_TRACKER_H + +#include +#include + +#define BUS_DBG_CON 0x000 +#define BUS_DBG_TIMER_CON0_26M 0x050 +#define BUS_TRACE_CON_AO_1 0x8FC +#define BUS_TRACE_CON_AO_2 0x9FC +#define BUS_TRACE_EN 16 + +#define SYS_TRACK_ENTRY 64 +#define INFRA_ENTRY_NUM 32 + +enum { + TRACKER_SYSTRACKER = 0, + TRACKER_INFRATRACKER, + TRACKER_NUM, +}; + +#endif diff --git a/src/soc/mediatek/mt8189/tracker.c b/src/soc/mediatek/mt8189/tracker.c new file mode 100644 index 0000000000..da9445db84 --- /dev/null +++ b/src/soc/mediatek/mt8189/tracker.c @@ -0,0 +1,55 @@ +/* SPDX-License-Identifier: GPL-2.0-only OR MIT */ + +#include +#include +#include +#include + +struct tracker tracker_data[TRACKER_NUM] = { + [TRACKER_SYSTRACKER] = { + .base_addr = AP_TRACKER_BASE, + .timeout = BUS_DBG_CON_TIMEOUT, + .entry = SYS_TRACK_ENTRY, + .offsets = tracker_v3_offsets, + .offsets_size = TRACKER_V3_OFFSETS_SIZE, + .str = "systracker", + }, + [TRACKER_INFRATRACKER] = { + .base_addr = INFRA_TRACKER_BASE, + .timeout = BUS_DBG_CON_TIMEOUT, + .entry = INFRA_ENTRY_NUM, + .offsets = tracker_v3_offsets, + .offsets_size = TRACKER_V3_OFFSETS_SIZE, + .str = "infra_tracker", + }, +}; + +void tracker_setup(void) +{ + u32 val; + /* + * Set ap/infra tracker timeout. + * timeout = clock_in_mhz / 15 * timeout_in_us + * + * timeout: 200ms + * ap tracker clock: 26MHz + * infra tracker clock: 26MHz + */ + val = 26 / 15 * 200000; + + write32p(AP_TRACKER_BASE + BUS_DBG_TIMER_CON0_26M, val); + write32p(INFRA_TRACKER_BASE + BUS_DBG_TIMER_CON0_26M, val); + + /* + * Enable infra/peri tracker. + * bit[0] - BUS_DBG_EN + * bit[1] - TIMEOUT_EN + * bit[2] - SLV_ERR_EN + * bit[9] - TIMER_CLOCK_SEL + * bit[13] - HALT_ON_TIMEOUT_EN + * bit[14] - BUS_OT_WEN_CTRL + */ + val = BIT(0) | BIT(1) | BIT(2) | BIT(9) | BIT(13) | BIT(14); + write32p(BUS_TRACE_MONITOR_BASE + BUS_TRACE_CON_AO_1, val); + write32p(BUS_TRACE_MONITOR_BASE + BUS_TRACE_CON_AO_2, val); +}