Marc reviewed the v3 device tree code and we developed the set of

cleanups/fixes.

Fixup device tree code. Add/change methods as needed. 
This should help serengeti.
Signed-off-by: Ronald G. Minnich<rminnich@gmail.com>
Acked-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net>
Acked-by: Corey Osgood <corey.osgood@gmail.com>
Acked-by: Marc Jones <marc.jones@amd.com>


git-svn-id: svn://coreboot.org/repository/coreboot-v3@954 f3766cd6-281f-0410-b1cd-43a5c92072e9
This commit is contained in:
Ronald G. Minnich 2008-10-27 20:05:38 +00:00
commit cedf16ca69
33 changed files with 62 additions and 73 deletions

View file

@ -754,14 +754,14 @@ void dev_phase2(void)
printk(BIOS_DEBUG, "Phase 2: Early setup...\n");
for (dev = all_devices; dev; dev = dev->next) {
printk(BIOS_SPEW,
"%s: dev %s: ops %p ops->phase2_setup_scan_bus %p\n",
"%s: dev %s: ops %p ops->phase2_fixup %p\n",
__FUNCTION__, dev->dtsname, dev->ops,
dev->ops? dev->ops->phase2_setup_scan_bus : NULL);
if (dev->ops && dev->ops->phase2_setup_scan_bus) {
dev->ops? dev->ops->phase2_fixup : NULL);
if (dev->ops && dev->ops->phase2_fixup) {
printk(BIOS_SPEW,
"Calling phase2 phase2_setup_scan_bus...\n");
dev->ops->phase2_setup_scan_bus(dev);
printk(BIOS_SPEW, "phase2_setup_scan_bus done\n");
"Calling phase2 phase2_fixup...\n");
dev->ops->phase2_fixup(dev);
printk(BIOS_SPEW, "phase2_fixup done\n");
}
}
@ -797,14 +797,12 @@ unsigned int dev_phase3_scan(struct device *busdevice, unsigned int max)
return max;
}
if (busdevice->ops->phase3_enable_scan)
busdevice->ops->phase3_enable_scan(busdevice);
do_phase3 = 1;
while (do_phase3) {
int link;
printk(BIOS_INFO, "%s: scanning %s(%s)\n", __FUNCTION__,
busdevice->dtsname, dev_path(busdevice));
#warning do we call phase3_enable here.
new_max = busdevice->ops->phase3_scan(busdevice, max);
do_phase3 = 0;
for (link = 0; link < busdevice->links; link++) {
@ -853,8 +851,8 @@ void dev_root_phase3(void)
printk(BIOS_INFO, "Phase 3: Enumerating buses...\n");
root = &dev_root;
if (root->ops && root->ops->phase3_enable_scan) {
root->ops->phase3_enable_scan(root);
if (root->ops && root->ops->phase3_chip_setup_dev) {
root->ops->phase3_chip_setup_dev(root);
}
post_code(POST_STAGE2_PHASE3_MIDDLE);
if (!root->ops) {

View file

@ -739,7 +739,6 @@ struct device_operations default_pci_ops_dev = {
.phase5_enable_resources = pci_dev_enable_resources,
.phase6_init = pci_dev_init,
.phase3_scan = 0,
.phase4_enable_disable = 0,
.ops_pci = &pci_dev_ops_pci,
};
@ -749,12 +748,11 @@ struct pci_operations pci_bus_ops_pci = {
};
struct device_operations default_pci_ops_bus = {
.phase3_scan = pci_scan_bridge,
.phase4_read_resources = pci_bus_read_resources,
.phase4_set_resources = pci_dev_set_resources,
.phase5_enable_resources = pci_bus_enable_resources,
.phase6_init = 0,
.phase3_scan = pci_scan_bridge,
.phase4_enable_disable = 0,
.reset_bus = pci_bus_reset,
.ops_pci = &pci_bus_ops_pci,
};
@ -1006,8 +1004,8 @@ struct device *pci_probe_dev(struct device *dev, struct bus *bus,
* it may be absent and enable_dev() must cope.
*/
/* Run the magic enable sequence for the device. */
if (dev->ops && dev->ops->phase3_enable_scan) {
dev->ops->phase3_enable_scan(dev);
if (dev->ops && dev->ops->phase3_chip_setup_dev) {
dev->ops->phase3_chip_setup_dev(dev);
}
/* Now read the vendor and device ID. */
id = pci_read_config32(dev, PCI_VENDOR_ID);
@ -1062,8 +1060,8 @@ struct device *pci_probe_dev(struct device *dev, struct bus *bus,
set_pci_ops(dev);
/* Now run the magic enable/disable sequence for the device. */
if (dev->ops && dev->ops->phase4_enable_disable) {
dev->ops->phase4_enable_disable(dev);
if (dev->ops && dev->ops->phase3_enable) {
dev->ops->phase3_enable(dev);
}
/* Display the device and error if we don't have some PCI operations

View file

@ -108,7 +108,8 @@ struct rom_header *pci_rom_probe(struct device *dev)
rom_data = (struct pci_data *)((unsigned char *)rom_header +
le32_to_cpu(rom_header->data));
printk(BIOS_SPEW, "PCI ROM Image, Vendor %04x, Device %04x,\n",
printk(BIOS_SPEW, "PCI ROM Image, @%p, Vendor %04x, Device %04x,\n",
&rom_data->vendor,
rom_data->vendor, rom_data->device);
if (dev->id.pci.vendor != rom_data->vendor || dev->id.pci.device != rom_data->device) {
printk(BIOS_ERR,

View file

@ -119,12 +119,12 @@ unsigned int scan_static_bus(struct device *busdevice, unsigned int max)
}
for (child = busdevice->link[link].children; child;
child = child->sibling) {
if (child->ops && child->ops->phase3_enable_scan) {
child->ops->phase3_enable_scan(child);
if (child->ops && child->ops->phase3_chip_setup_dev) {
child->ops->phase3_chip_setup_dev(child);
}
/* Sigh. Have to enable to scan... */
if (child->ops && child->ops->phase5_enable_resources) {
child->ops->phase5_enable_resources(child);
if (child->ops && child->ops->phase3_enable) {
child->ops->phase3_enable(child);
}
if (child->path.type == DEVICE_PATH_I2C) {
printk(BIOS_DEBUG, "smbus: %s(%s)[%d]->",
@ -217,11 +217,11 @@ void root_dev_reset(struct bus *bus)
* mainboard directory.
*/
struct device_operations default_dev_ops_root = {
.phase3_scan = root_dev_scan_bus,
.phase4_read_resources = root_dev_read_resources,
.phase4_set_resources = root_dev_set_resources,
.phase5_enable_resources = root_dev_enable_resources,
.phase6_init = root_dev_init,
.phase3_scan = root_dev_scan_bus,
.reset_bus = root_dev_reset,
};