Marc reviewed the v3 device tree code and we developed the set of
cleanups/fixes. Fixup device tree code. Add/change methods as needed. This should help serengeti. Signed-off-by: Ronald G. Minnich<rminnich@gmail.com> Acked-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net> Acked-by: Corey Osgood <corey.osgood@gmail.com> Acked-by: Marc Jones <marc.jones@amd.com> git-svn-id: svn://coreboot.org/repository/coreboot-v3@954 f3766cd6-281f-0410-b1cd-43a5c92072e9
This commit is contained in:
parent
7bc7f67bfb
commit
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33 changed files with 62 additions and 73 deletions
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@ -754,14 +754,14 @@ void dev_phase2(void)
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printk(BIOS_DEBUG, "Phase 2: Early setup...\n");
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for (dev = all_devices; dev; dev = dev->next) {
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printk(BIOS_SPEW,
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"%s: dev %s: ops %p ops->phase2_setup_scan_bus %p\n",
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"%s: dev %s: ops %p ops->phase2_fixup %p\n",
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__FUNCTION__, dev->dtsname, dev->ops,
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dev->ops? dev->ops->phase2_setup_scan_bus : NULL);
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if (dev->ops && dev->ops->phase2_setup_scan_bus) {
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dev->ops? dev->ops->phase2_fixup : NULL);
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if (dev->ops && dev->ops->phase2_fixup) {
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printk(BIOS_SPEW,
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"Calling phase2 phase2_setup_scan_bus...\n");
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dev->ops->phase2_setup_scan_bus(dev);
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printk(BIOS_SPEW, "phase2_setup_scan_bus done\n");
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"Calling phase2 phase2_fixup...\n");
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dev->ops->phase2_fixup(dev);
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printk(BIOS_SPEW, "phase2_fixup done\n");
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}
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}
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@ -797,14 +797,12 @@ unsigned int dev_phase3_scan(struct device *busdevice, unsigned int max)
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return max;
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}
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if (busdevice->ops->phase3_enable_scan)
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busdevice->ops->phase3_enable_scan(busdevice);
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do_phase3 = 1;
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while (do_phase3) {
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int link;
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printk(BIOS_INFO, "%s: scanning %s(%s)\n", __FUNCTION__,
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busdevice->dtsname, dev_path(busdevice));
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#warning do we call phase3_enable here.
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new_max = busdevice->ops->phase3_scan(busdevice, max);
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do_phase3 = 0;
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for (link = 0; link < busdevice->links; link++) {
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@ -853,8 +851,8 @@ void dev_root_phase3(void)
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printk(BIOS_INFO, "Phase 3: Enumerating buses...\n");
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root = &dev_root;
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if (root->ops && root->ops->phase3_enable_scan) {
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root->ops->phase3_enable_scan(root);
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if (root->ops && root->ops->phase3_chip_setup_dev) {
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root->ops->phase3_chip_setup_dev(root);
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}
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post_code(POST_STAGE2_PHASE3_MIDDLE);
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if (!root->ops) {
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@ -739,7 +739,6 @@ struct device_operations default_pci_ops_dev = {
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.phase5_enable_resources = pci_dev_enable_resources,
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.phase6_init = pci_dev_init,
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.phase3_scan = 0,
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.phase4_enable_disable = 0,
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.ops_pci = &pci_dev_ops_pci,
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};
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@ -749,12 +748,11 @@ struct pci_operations pci_bus_ops_pci = {
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};
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struct device_operations default_pci_ops_bus = {
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.phase3_scan = pci_scan_bridge,
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.phase4_read_resources = pci_bus_read_resources,
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.phase4_set_resources = pci_dev_set_resources,
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.phase5_enable_resources = pci_bus_enable_resources,
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.phase6_init = 0,
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.phase3_scan = pci_scan_bridge,
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.phase4_enable_disable = 0,
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.reset_bus = pci_bus_reset,
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.ops_pci = &pci_bus_ops_pci,
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};
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@ -1006,8 +1004,8 @@ struct device *pci_probe_dev(struct device *dev, struct bus *bus,
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* it may be absent and enable_dev() must cope.
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*/
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/* Run the magic enable sequence for the device. */
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if (dev->ops && dev->ops->phase3_enable_scan) {
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dev->ops->phase3_enable_scan(dev);
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if (dev->ops && dev->ops->phase3_chip_setup_dev) {
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dev->ops->phase3_chip_setup_dev(dev);
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}
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/* Now read the vendor and device ID. */
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id = pci_read_config32(dev, PCI_VENDOR_ID);
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@ -1062,8 +1060,8 @@ struct device *pci_probe_dev(struct device *dev, struct bus *bus,
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set_pci_ops(dev);
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/* Now run the magic enable/disable sequence for the device. */
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if (dev->ops && dev->ops->phase4_enable_disable) {
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dev->ops->phase4_enable_disable(dev);
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if (dev->ops && dev->ops->phase3_enable) {
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dev->ops->phase3_enable(dev);
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}
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/* Display the device and error if we don't have some PCI operations
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@ -108,7 +108,8 @@ struct rom_header *pci_rom_probe(struct device *dev)
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rom_data = (struct pci_data *)((unsigned char *)rom_header +
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le32_to_cpu(rom_header->data));
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printk(BIOS_SPEW, "PCI ROM Image, Vendor %04x, Device %04x,\n",
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printk(BIOS_SPEW, "PCI ROM Image, @%p, Vendor %04x, Device %04x,\n",
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&rom_data->vendor,
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rom_data->vendor, rom_data->device);
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if (dev->id.pci.vendor != rom_data->vendor || dev->id.pci.device != rom_data->device) {
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printk(BIOS_ERR,
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@ -119,12 +119,12 @@ unsigned int scan_static_bus(struct device *busdevice, unsigned int max)
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}
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for (child = busdevice->link[link].children; child;
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child = child->sibling) {
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if (child->ops && child->ops->phase3_enable_scan) {
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child->ops->phase3_enable_scan(child);
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if (child->ops && child->ops->phase3_chip_setup_dev) {
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child->ops->phase3_chip_setup_dev(child);
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}
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/* Sigh. Have to enable to scan... */
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if (child->ops && child->ops->phase5_enable_resources) {
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child->ops->phase5_enable_resources(child);
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if (child->ops && child->ops->phase3_enable) {
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child->ops->phase3_enable(child);
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}
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if (child->path.type == DEVICE_PATH_I2C) {
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printk(BIOS_DEBUG, "smbus: %s(%s)[%d]->",
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@ -217,11 +217,11 @@ void root_dev_reset(struct bus *bus)
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* mainboard directory.
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*/
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struct device_operations default_dev_ops_root = {
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.phase3_scan = root_dev_scan_bus,
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.phase4_read_resources = root_dev_read_resources,
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.phase4_set_resources = root_dev_set_resources,
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.phase5_enable_resources = root_dev_enable_resources,
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.phase6_init = root_dev_init,
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.phase3_scan = root_dev_scan_bus,
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.reset_bus = root_dev_reset,
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};
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