soc/amd/cezanne: enable crypto in psp_verstage

Enable RSA and SHA for cezanne since support has been added to the PSP.
Also picasso and cezanne have different enums definitions for
hash algorithm, so split that out into chipset.c.

BUG=b:187906425
TEST=boot guybrush, check cbmem -t and the logs

Signed-off-by: Kangheui Won <khwon@chromium.org>
Change-Id: I725b0cac801ac0429f362a83aa58a8b9de158550
Reviewed-on: https://review.coreboot.org/c/coreboot/+/55833
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Raul Rangel <rrangel@chromium.org>
This commit is contained in:
Kangheui Won 2021-06-25 16:03:05 +10:00 committed by Felix Held
commit ce0fad5e39
7 changed files with 101 additions and 16 deletions

View file

@ -1,12 +1,6 @@
/* SPDX-License-Identifier: GPL-2.0-only */
/* This file contains stub for not-yet-implemented svc in cezanne PSP.
* So this file will and should be removed eventually when psp_verstage works
* correctly in cezanne.
*/
#include <bl_uapp/bl_syscall_public.h>
#include <console/console.h>
#include <psp_verstage.h>
uint32_t update_psp_bios_dir(uint32_t *psp_dir_offset, uint32_t *bios_dir_offset)
@ -24,6 +18,21 @@ uint32_t get_bios_dir_addr(struct psp_ef_table *ef_table)
return ef_table->bios3_entry;
}
int platform_set_sha_op(enum vb2_hash_algorithm hash_alg,
struct sha_generic_data *sha_op)
{
if (hash_alg == VB2_HASH_SHA256) {
sha_op->SHAType = SHA_TYPE_256;
sha_op->DigestLen = 32;
} else if (hash_alg == VB2_HASH_SHA384) {
sha_op->SHAType = SHA_TYPE_384;
sha_op->DigestLen = 48;
} else {
return -1;
}
return 0;
}
/* Functions below are stub functions for not-yet-implemented PSP features.
* These functions should be replaced with proper implementations later.

View file

@ -112,3 +112,17 @@ uint32_t svc_reset_system(enum reset_type reset_type)
SVC_CALL1(SVC_RESET_SYSTEM, reset_type, retval);
return retval;
}
uint32_t svc_crypto_sha(struct sha_generic_data *sha_op, enum sha_operation_mode sha_mode)
{
uint32_t retval = 0;
SVC_CALL2(SVC_SHA, sha_op, sha_mode, retval);
return retval;
}
uint32_t svc_modexp(struct mod_exp_params *mod_exp_param)
{
uint32_t retval = 0;
SVC_CALL1(SVC_MODEXP, mod_exp_param, retval);
return retval;
}

View file

@ -16,10 +16,7 @@ verstage-y += psp_verstage.c
verstage-y += psp.c
verstage-y += reset.c
verstage-y += timer.c
ifneq ($(CONFIG_SOC_AMD_CEZANNE),y)
# cezanne PSP does not support these functions yet (b/187906425)
verstage-y += vboot_crypto.c
endif
$(obj)/psp_verstage.bin: $(objcbfs)/verstage.elf
$(OBJCOPY_verstage) -O binary $^ $@

View file

@ -3,6 +3,8 @@
#ifndef PSP_VERSTAGE_H
#define PSP_VERSTAGE_H
#include <2crypto.h>
#include <bl_uapp/bl_syscall_public.h>
#include <stdint.h>
#include <soc/psp_transfer.h>
@ -62,5 +64,7 @@ uint32_t get_max_workbuf_size(uint32_t *size);
uint32_t update_psp_bios_dir(uint32_t *psp_dir_offset, uint32_t *bios_dir_offset);
uint32_t save_uapp_data(void *address, uint32_t size);
uint32_t get_bios_dir_addr(struct psp_ef_table *ef_table);
int platform_set_sha_op(enum vb2_hash_algorithm hash_alg,
struct sha_generic_data *sha_op);
#endif /* PSP_VERSTAGE_H */

View file

@ -21,13 +21,7 @@ vb2_error_t vb2ex_hwcrypto_digest_init(enum vb2_hash_algorithm hash_alg, uint32_
sha_op_size_remaining = data_size;
if (hash_alg == VB2_HASH_SHA256) {
sha_op.SHAType = SHA_TYPE_256;
sha_op.DigestLen = 32;
} else if (hash_alg == VB2_HASH_SHA512) {
sha_op.SHAType = SHA_TYPE_512;
sha_op.DigestLen = 64;
} else {
if (platform_set_sha_op(hash_alg, &sha_op) != 0) {
printk(BIOS_INFO, "Unsupported hash_alg %d!\n", hash_alg);
return VB2_ERROR_EX_HWCRYPTO_UNSUPPORTED;
}

View file

@ -23,3 +23,18 @@ uint32_t get_bios_dir_addr(struct psp_ef_table *ef_table)
{
return ef_table->bios1_entry;
}
int platform_set_sha_op(enum vb2_hash_algorithm hash_alg,
struct sha_generic_data *sha_op)
{
if (hash_alg == VB2_HASH_SHA256) {
sha_op->SHAType = SHA_TYPE_256;
sha_op->DigestLen = 32;
} else if (hash_alg == VB2_HASH_SHA512) {
sha_op->SHAType = SHA_TYPE_512;
sha_op->DigestLen = 64;
} else {
return -1;
}
return 0;
}