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mb/google/fatcat: Create new fatcat4es variant

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This new variant created will support PTL pre-production silicon. The
existing `fatcat` variant will support production silicon.

BUG=b:424355826
TEST=Able to build google/fatcat4es.

Change-Id: I0f925a73a42aaf6d3ae6980169d912374b12d8ae
Signed-off-by: Pranava Y N <pranavayn@google.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/88171
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Subrata Banik <subratabanik@google.com>
This commit is contained in:
Pranava Y N 2025-06-23 12:39:34 +05:30 • committed by Matt DeVillier
commit cdf0c76dc8
3 changed files with 11 additions and 1 deletions
Download patch file Download diff file Expand all files Collapse all files

6
src/mainboard/google/fatcat/Kconfig
View file

@ -77,6 +77,11 @@ config BOARD_GOOGLE_FATCAT
select EC_GOOGLE_CHROMEEC_MEC
select MAINBOARD_USES_IFD_EC_REGION
config BOARD_GOOGLE_FATCAT4ES
select BOARD_GOOGLE_MODEL_FATCAT
select EC_GOOGLE_CHROMEEC_MEC
select MAINBOARD_USES_IFD_EC_REGION
config BOARD_GOOGLE_FATCATISH
select BOARD_GOOGLE_MODEL_FATCAT
select EC_GOOGLE_CHROMEEC_MEC
@ -152,6 +157,7 @@ config MAINBOARD_FAMILY
config MAINBOARD_PART_NUMBER
default "Fatcat" if BOARD_GOOGLE_FATCAT
default "Fatcat4ES" if BOARD_GOOGLE_FATCAT4ES
default "Fatcat_ish" if BOARD_GOOGLE_FATCATISH
default "Fatcatite" if BOARD_GOOGLE_FATCATITE
default "Fatcatnuvo" if BOARD_GOOGLE_FATCATNUVO

3
src/mainboard/google/fatcat/Kconfig.name
View file

@ -5,6 +5,9 @@ comment "Fatcat"
config BOARD_GOOGLE_FATCAT
bool "-> Fatcat"
config BOARD_GOOGLE_FATCAT4ES
bool "-> Fatcat4ES"
config BOARD_GOOGLE_FATCATISH
bool "-> Fatcat_ish"

3
src/mainboard/google/fatcat/variants/baseboard/fatcat/include/baseboard/gpio.h
View file

@ -16,7 +16,8 @@
#define EC_SYNC_IRQ GPP_E07_IRQ
#define GPIO_PCH_WP GPP_D02
#define GPIO_SLP_S0_GATE 0 /* Not Connected */
#elif CONFIG(BOARD_GOOGLE_FATCAT) || CONFIG(BOARD_GOOGLE_FATCATISH)
#elif (CONFIG(BOARD_GOOGLE_FATCAT) || CONFIG(BOARD_GOOGLE_FATCAT4ES) \
|| CONFIG(BOARD_GOOGLE_FATCATISH))
#define EC_SYNC_IRQ 0 /* Not Connected */
#define GPIO_PCH_WP GPP_D02
#define GPIO_SLP_S0_GATE 0 /* Not Connected */