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Broadwell FSP: Successful execution of SiliconInit

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Add support to call FspSiliconInit

BRANCH=none
BUG=None
TEST=Use the following steps to reproduce:
1.  Get the private FSP parts
2.  Copy configs/config.samus.fsp to configs/config.samus
3.  Build and run on Samus
4.  After power on, POST code should be 0x35 if successful, hangs in
    src/soc/intel/broadwell/romstage/romstage.c/romstage_after_car

Change-Id: I80363425df97bf1f1f9b9180f2fd4c625125d33e
Signed-off-by: Lee Leahy <Leroy.P.Leahy@intel.com>
Reviewed-on: https://chromium-review.googlesource.com/232383
Reviewed-by: Duncan Laurie <dlaurie@chromium.org>
Commit-Queue: Leroy P Leahy <leroy.p.leahy@intel.com>
Tested-by: Leroy P Leahy <leroy.p.leahy@intel.com>
This commit is contained in:
Lee Leahy 2014-12-01 14:55:42 -08:00 • committed by chrome-internal-fetch
commit cda3009616
1 changed files with 13 additions and 0 deletions
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13
src/soc/intel/broadwell/romstage/romstage.c
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@ -207,11 +207,24 @@ void romstage_common(struct romstage_params *params)
void asmlinkage romstage_after_car(void)
{
#if IS_ENABLED(CONFIG_PLATFORM_USES_FSP)
FSP_INFO_HEADER *fsp_info_header;
FSP_SILICON_INIT fsp_silicon_init;
EFI_STATUS status;
printk(BIOS_DEBUG, "FspTempRamExit returned successfully\n");
#endif /* CONFIG_PLATFORM_USES_FSP */
timestamp_add_now(TS_END_ROMSTAGE);
#if IS_ENABLED(CONFIG_PLATFORM_USES_FSP)
printk(BIOS_DEBUG, "Calling FspSiliconInit\n");
fsp_info_header = find_fsp();
fsp_silicon_init = (FSP_SILICON_INIT)(fsp_info_header->ImageBase
+ fsp_info_header->FspSiliconInitEntryOffset);
status = fsp_silicon_init(NULL);
printk(BIOS_DEBUG, "FspSiliconInit returned 0x%08x\n", status);
#endif /* CONFIG_PLATFORM_USES_FSP */
#if IS_ENABLED(CONFIG_PLATFORM_USES_FSP)
/* TODO: Remove this code. Temporary code to hang after FSP TempRamInit API */
printk(BIOS_ERR, "Hanging in romstage_after_car!\n");