coreboot: Replace all IS_ENABLED(CONFIG_XXX) with CONFIG(XXX)
This patch is a raw application of find src/ -type f | xargs sed -i -e 's/IS_ENABLED\s*(CONFIG_/CONFIG(/g' Change-Id: I6262d6d5c23cabe23c242b4f38d446b74fe16b88 Signed-off-by: Julius Werner <jwerner@chromium.org> Reviewed-on: https://review.coreboot.org/c/coreboot/+/31774 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Patrick Georgi <pgeorgi@google.com>
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920 changed files with 2285 additions and 2285 deletions
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@ -1,7 +1,7 @@
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#ifndef PC80_MC146818RTC_H
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#define PC80_MC146818RTC_H
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#if IS_ENABLED(CONFIG_ARCH_X86)
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#if CONFIG(ARCH_X86)
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#include <arch/io.h>
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#include <types.h>
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@ -193,8 +193,8 @@ unsigned int read_option_lowlevel(unsigned int start, unsigned int size,
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#define read_option(name, default) read_option_lowlevel(CMOS_VSTART_ ##name, \
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CMOS_VLEN_ ##name, (default))
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#if IS_ENABLED(CONFIG_CMOS_POST)
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#if IS_ENABLED(CONFIG_USE_OPTION_TABLE)
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#if CONFIG(CMOS_POST)
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#if CONFIG(USE_OPTION_TABLE)
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# include "option_table.h"
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# define CMOS_POST_OFFSET (CMOS_VSTART_cmos_post_offset >> 3)
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#else
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@ -241,7 +241,7 @@ static inline void cmos_post_init(void)
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/* Initialize to zero */
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cmos_write(0, CMOS_POST_BANK_0_OFFSET);
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cmos_write(0, CMOS_POST_BANK_1_OFFSET);
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#if IS_ENABLED(CONFIG_CMOS_POST_EXTRA)
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#if CONFIG(CMOS_POST_EXTRA)
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cmos_write32(CMOS_POST_BANK_0_EXTRA, 0);
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cmos_write32(CMOS_POST_BANK_1_EXTRA, 0);
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#endif
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@ -254,7 +254,7 @@ static inline void cmos_post_log(void) {}
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static inline void cmos_post_init(void) {}
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#endif /* CONFIG_CMOS_POST */
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#if IS_ENABLED(CONFIG_USE_OPTION_TABLE)
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#if CONFIG(USE_OPTION_TABLE)
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void sanitize_cmos(void);
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#else
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static inline void sanitize_cmos(void) {}
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