From cc29db483fde05d4d90b80fd3877a338748c5980 Mon Sep 17 00:00:00 2001 From: =?UTF-8?q?Micha=C5=82=20Kope=C4=87?= Date: Mon, 3 Mar 2025 16:18:39 +0100 Subject: [PATCH] mb/novacustom/mtl-h/devicetree.cb: Set SOC aux override MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit Set TCSS SOC Aux orientation override as per the mainboard schematic. Change-Id: I45903f26a3f724e6bd82645b0fe3d1e919a84833 Signed-off-by: Michał Kopeć Reviewed-on: https://review.coreboot.org/c/coreboot/+/86697 Reviewed-by: Michał Żygowski Tested-by: build bot (Jenkins) --- src/mainboard/novacustom/mtl-h/devicetree.cb | 9 +++++++++ 1 file changed, 9 insertions(+) diff --git a/src/mainboard/novacustom/mtl-h/devicetree.cb b/src/mainboard/novacustom/mtl-h/devicetree.cb index 22eceacb1a..046b7a7599 100644 --- a/src/mainboard/novacustom/mtl-h/devicetree.cb +++ b/src/mainboard/novacustom/mtl-h/devicetree.cb @@ -90,6 +90,15 @@ chip soc/intel/meteorlake device ref crashlog on end device ref vpu on end device ref tcss_xhci on + # SOC Aux orientation override: + # This is a bitfield that corresponds to up to 4 TCSS ports. + # Bits (0,1) allocated for TCSS Port1 configuration and Bits (2,3)for TCSS Port2. + # Bits (4,5) allocated for TCSS Port3 configuration and Bits (6,7)for TCSS Port4. + # Bit0,Bit2,Bit4,Bit6 set to "1" indicates no retimer on USBC Ports + # Bit1,Bit3,Bit5,Bit7 set to "0" indicates Aux lines are not swapped on the + # motherboard to USBC connector + register "tcss_aux_ori" = "0x54" + register "tcss_ports" = "{ [0] = TCSS_PORT_DEFAULT(OC_SKIP), /* USB Type-C Port 1 (TBT) */ [1] = TCSS_PORT_DEFAULT(OC_SKIP), /* USB Type-C Port 2 (Non-TBT) */