nyan*: enable CLAMP_INPUTS
Enable pinmux clamp function to avoid pinmux conflict. For pins which are configured to tristate enabled, the inputs to the controller will be clamped to zero. This can be used to avoid pinmux conflicts since the tristate bit is set to 1 in the power-on-reset pinmux setting. With pinmux clamp enabled, we need to configure all the input pins to tristate disabled. BUG=chrome-os-partner:27091 BRANCH=None TEST=built and booted successfully, display worked fine. Change-Id: Id79a717f2025c812908c7152d439351208aee8d2 Signed-off-by: Ken Chang <kenc@nvidia.com> Reviewed-on: https://chromium-review.googlesource.com/194060 Reviewed-by: Gabe Black <gabeblack@chromium.org>
This commit is contained in:
Ken Chang
chrome-internal-fetch
parent
1a1848b00a
commit
c95d6fe798
7 changed files with 35 additions and 20 deletions
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@ -94,8 +94,6 @@ static void setup_pinmux(void)
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// TODO(hungte) Revice pinmux setup, make nice little SoC functions for
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// every single logical thing instead of dumping a wall of code below.
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uint32_t pin_up = PINMUX_PULL_UP | PINMUX_INPUT_ENABLE,
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pin_up3 = (PINMUX_PULL_UP | PINMUX_INPUT_ENABLE |
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PINMUX_TRISTATE),
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pin_down = PINMUX_PULL_DOWN | PINMUX_INPUT_ENABLE,
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pin_none = PINMUX_PULL_NONE | PINMUX_INPUT_ENABLE;
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@ -113,7 +111,7 @@ static void setup_pinmux(void)
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pinmux_set_config(PINMUX_SDMMC3_DAT3_INDEX,
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PINMUX_SDMMC3_DAT3_FUNC_SDMMC3 | pin_up);
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pinmux_set_config(PINMUX_SDMMC3_CLK_LB_IN_INDEX,
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PINMUX_SDMMC3_CLK_LB_IN_FUNC_SDMMC3 | pin_up3);
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PINMUX_SDMMC3_CLK_LB_IN_FUNC_SDMMC3 | pin_up);
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pinmux_set_config(PINMUX_SDMMC3_CLK_LB_OUT_INDEX,
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PINMUX_SDMMC3_CLK_LB_OUT_FUNC_SDMMC3 | pin_down);
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@ -155,8 +153,7 @@ static void setup_pinmux(void)
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/* I2S1 */
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pinmux_set_config(PINMUX_DAP2_DIN_INDEX,
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PINMUX_DAP2_DIN_FUNC_I2S1 | PINMUX_TRISTATE |
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PINMUX_INPUT_ENABLE);
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PINMUX_DAP2_DIN_FUNC_I2S1 | PINMUX_INPUT_ENABLE);
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pinmux_set_config(PINMUX_DAP2_DOUT_INDEX,
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PINMUX_DAP2_DOUT_FUNC_I2S1 | PINMUX_INPUT_ENABLE);
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pinmux_set_config(PINMUX_DAP2_FS_INDEX,
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@ -167,6 +164,10 @@ static void setup_pinmux(void)
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/* PWM1 */
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pinmux_set_config(PINMUX_GPIO_PH1_INDEX,
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PINMUX_GPIO_PH1_FUNC_PWM1 | PINMUX_PULL_NONE);
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/* DP HPD */
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pinmux_set_config(PINMUX_DP_HPD_INDEX,
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PINMUX_DP_HPD_FUNC_DP | PINMUX_INPUT_ENABLE);
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}
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static void setup_kernel_info(void)
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@ -94,8 +94,6 @@ static void setup_pinmux(void)
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// TODO(hungte) Revice pinmux setup, make nice little SoC functions for
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// every single logical thing instead of dumping a wall of code below.
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uint32_t pin_up = PINMUX_PULL_UP | PINMUX_INPUT_ENABLE,
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pin_up3 = (PINMUX_PULL_UP | PINMUX_INPUT_ENABLE |
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PINMUX_TRISTATE),
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pin_down = PINMUX_PULL_DOWN | PINMUX_INPUT_ENABLE,
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pin_none = PINMUX_PULL_NONE | PINMUX_INPUT_ENABLE;
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@ -113,7 +111,7 @@ static void setup_pinmux(void)
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pinmux_set_config(PINMUX_SDMMC3_DAT3_INDEX,
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PINMUX_SDMMC3_DAT3_FUNC_SDMMC3 | pin_up);
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pinmux_set_config(PINMUX_SDMMC3_CLK_LB_IN_INDEX,
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PINMUX_SDMMC3_CLK_LB_IN_FUNC_SDMMC3 | pin_up3);
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PINMUX_SDMMC3_CLK_LB_IN_FUNC_SDMMC3 | pin_up);
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pinmux_set_config(PINMUX_SDMMC3_CLK_LB_OUT_INDEX,
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PINMUX_SDMMC3_CLK_LB_OUT_FUNC_SDMMC3 | pin_down);
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@ -155,8 +153,7 @@ static void setup_pinmux(void)
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/* I2S1 */
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pinmux_set_config(PINMUX_DAP2_DIN_INDEX,
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PINMUX_DAP2_DIN_FUNC_I2S1 | PINMUX_TRISTATE |
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PINMUX_INPUT_ENABLE);
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PINMUX_DAP2_DIN_FUNC_I2S1 | PINMUX_INPUT_ENABLE);
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pinmux_set_config(PINMUX_DAP2_DOUT_INDEX,
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PINMUX_DAP2_DOUT_FUNC_I2S1 | PINMUX_INPUT_ENABLE);
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pinmux_set_config(PINMUX_DAP2_FS_INDEX,
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@ -167,6 +164,10 @@ static void setup_pinmux(void)
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/* PWM1 */
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pinmux_set_config(PINMUX_GPIO_PH1_INDEX,
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PINMUX_GPIO_PH1_FUNC_PWM1 | PINMUX_PULL_NONE);
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/* DP HPD */
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pinmux_set_config(PINMUX_DP_HPD_INDEX,
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PINMUX_DP_HPD_FUNC_DP | PINMUX_INPUT_ENABLE);
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}
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static void setup_kernel_info(void)
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@ -94,8 +94,6 @@ static void setup_pinmux(void)
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// TODO(hungte) Revice pinmux setup, make nice little SoC functions for
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// every single logical thing instead of dumping a wall of code below.
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uint32_t pin_up = PINMUX_PULL_UP | PINMUX_INPUT_ENABLE,
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pin_up3 = (PINMUX_PULL_UP | PINMUX_INPUT_ENABLE |
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PINMUX_TRISTATE),
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pin_down = PINMUX_PULL_DOWN | PINMUX_INPUT_ENABLE,
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pin_none = PINMUX_PULL_NONE | PINMUX_INPUT_ENABLE;
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@ -113,7 +111,7 @@ static void setup_pinmux(void)
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pinmux_set_config(PINMUX_SDMMC3_DAT3_INDEX,
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PINMUX_SDMMC3_DAT3_FUNC_SDMMC3 | pin_up);
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pinmux_set_config(PINMUX_SDMMC3_CLK_LB_IN_INDEX,
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PINMUX_SDMMC3_CLK_LB_IN_FUNC_SDMMC3 | pin_up3);
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PINMUX_SDMMC3_CLK_LB_IN_FUNC_SDMMC3 | pin_up);
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pinmux_set_config(PINMUX_SDMMC3_CLK_LB_OUT_INDEX,
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PINMUX_SDMMC3_CLK_LB_OUT_FUNC_SDMMC3 | pin_down);
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@ -155,8 +153,7 @@ static void setup_pinmux(void)
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/* I2S1 */
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pinmux_set_config(PINMUX_DAP2_DIN_INDEX,
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PINMUX_DAP2_DIN_FUNC_I2S1 | PINMUX_TRISTATE |
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PINMUX_INPUT_ENABLE);
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PINMUX_DAP2_DIN_FUNC_I2S1 | PINMUX_INPUT_ENABLE);
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pinmux_set_config(PINMUX_DAP2_DOUT_INDEX,
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PINMUX_DAP2_DOUT_FUNC_I2S1 | PINMUX_INPUT_ENABLE);
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pinmux_set_config(PINMUX_DAP2_FS_INDEX,
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@ -167,6 +164,10 @@ static void setup_pinmux(void)
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/* PWM1 */
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pinmux_set_config(PINMUX_GPIO_PH1_INDEX,
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PINMUX_GPIO_PH1_FUNC_PWM1 | PINMUX_PULL_NONE);
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/* DP HPD */
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pinmux_set_config(PINMUX_DP_HPD_INDEX,
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PINMUX_DP_HPD_FUNC_DP | PINMUX_INPUT_ENABLE);
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}
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static void setup_kernel_info(void)
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@ -22,8 +22,14 @@
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#include "apbmisc.h"
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static struct apbmisc *misc = (struct apbmisc *)TEGRA_APB_MISC_BASE;
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void enable_jtag(void)
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{
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struct apbmisc *misc = (struct apbmisc *)TEGRA_APB_MISC_BASE;
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write32(PP_CONFIG_CTL_JTAG, &misc->pp_config_ctl);
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}
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void clamp_tristate_inputs(void)
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{
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write32(PP_PINMUX_CLAMP_INPUTS, &misc->pp_pinmux_global);
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}
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@ -25,11 +25,17 @@
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struct apbmisc {
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u32 reserved0[9]; /* ABP_MISC_PP_ offsets 00-20 */
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u32 pp_config_ctl; /* _CONFIG_CTL_0, offset 24 */
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u32 reserved1[6]; /* APB_MISC_PP_ offsets 28-3C */
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u32 pp_pinmux_global; /* _PINMUX_GLOBAL_0, offset 40 */
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};
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#define PP_CONFIG_CTL_TBE (1 << 7)
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#define PP_CONFIG_CTL_JTAG (1 << 6)
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#define PP_PINMUX_CLAMP_INPUTS (1 << 0)
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void enable_jtag(void);
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void clamp_tristate_inputs(void);
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#endif /* __SOC_NVIDIA_TEGRA_APBMISC_H__ */
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@ -29,7 +29,7 @@
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void __gpio_input(gpio_t gpio, u32 pull)
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{
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u32 pinmux_config = PINMUX_INPUT_ENABLE | PINMUX_TRISTATE | pull;
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u32 pinmux_config = PINMUX_INPUT_ENABLE | pull;
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gpio_set_int_enable(gpio, 0);
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gpio_set_out_enable(gpio, 0);
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@ -32,6 +32,9 @@ void main(void)
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{
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void *entry;
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// enable pinmux clamp inputs
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clamp_tristate_inputs();
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// enable JTAG at the earliest stage
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enable_jtag();
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@ -41,13 +44,11 @@ void main(void)
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pinmux_set_config(PINMUX_KB_ROW9_INDEX, PINMUX_KB_ROW9_FUNC_UA3);
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// Serial in, tristate_on.
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pinmux_set_config(PINMUX_KB_ROW10_INDEX, PINMUX_KB_ROW10_FUNC_UA3 |
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PINMUX_TRISTATE |
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PINMUX_PULL_UP |
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PINMUX_INPUT_ENABLE);
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// Mux some pins away from uart A.
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pinmux_set_config(PINMUX_UART2_CTS_N_INDEX,
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PINMUX_UART2_CTS_N_FUNC_UB3 |
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PINMUX_TRISTATE |
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PINMUX_INPUT_ENABLE);
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pinmux_set_config(PINMUX_UART2_RTS_N_INDEX,
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PINMUX_UART2_RTS_N_FUNC_UB3);
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@ -67,7 +68,6 @@ void main(void)
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PINMUX_CPU_PWR_REQ_FUNC_CPU);
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pinmux_set_config(PINMUX_PWR_INT_N_INDEX,
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PINMUX_PWR_INT_N_FUNC_PMICINTR |
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PINMUX_TRISTATE |
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PINMUX_INPUT_ENABLE);
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power_enable_cpu_rail();
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