{drivers, mb, soc}: Drop HAVE_FSP_LOGO_SUPPORT Kconfig

This change eliminates the HAVE_FSP_LOGO_SUPPORT Kconfig option.

It was initially used to control BMP_LOGO selection within the FSP2.0
driver. However, upcoming refactoring will move BMP_LOGO and its
implementation to the `lib` directory therefore, BMP_LOGO can be
used by both FSP and non-FSP SoC platforms.

BUG=b:400738815
TEST=Able to build and boot google/brox.

Change-Id: I899bbfcf7e747abe69ff0866c4594a42278891b9
Signed-off-by: Subrata Banik <subratabanik@google.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/86719
Reviewed-by: Jérémy Compostella <jeremy.compostella@intel.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Dinesh Gehlot <digehlot@google.com>

src/drivers/intel/fsp2_0/Kconfig

@@ -265,14 +265,9 @@ config FSP_PLATFORM_MEMORY_SETTINGS_VERSIONS
 	  This allows deployed systems to bump their version number
 	  with the same FSP which will trigger a retrain of the memory.
 
-config HAVE_FSP_LOGO_SUPPORT
-	bool
-	default n
-
 config BMP_LOGO
 	bool "Enable logo"
 	default n
-	depends on HAVE_FSP_LOGO_SUPPORT
 	help
 	  Uses the FSP to display the boot logo. This method supports a
 	  BMP file only. The uncompressed size can be up to 1 MB. The logo can

src/mainboard/google/brox/Kconfig

@@ -21,7 +21,6 @@ config BOARD_GOOGLE_BROX_COMMON
 	select FW_CONFIG_SOURCE_CHROMEEC_CBI
 	select GOOGLE_SMBIOS_MAINBOARD_VERSION
 	select HAVE_ACPI_TABLES
-	select HAVE_FSP_LOGO_SUPPORT if RUN_FSP_GOP
 	select I2C_TPM
 	select INTEL_LPSS_UART_FOR_CONSOLE
 	select MAINBOARD_HAS_CHROMEOS

src/mainboard/google/brya/Kconfig

@@ -29,7 +29,6 @@ config BOARD_GOOGLE_BRYA_COMMON
 	select FW_CONFIG_SOURCE_CHROMEEC_CBI
 	select GOOGLE_SMBIOS_MAINBOARD_VERSION
 	select HAVE_ACPI_TABLES
-	select HAVE_FSP_LOGO_SUPPORT if RUN_FSP_GOP
 	select I2C_TPM
 	select INTEL_LPSS_UART_FOR_CONSOLE
 	select MAINBOARD_HAS_CHROMEOS

src/soc/amd/mendocino/Kconfig

@@ -17,7 +17,6 @@ config SOC_AMD_REMBRANDT_BASE
 	select HAVE_CF9_RESET
 	select HAVE_EM100_SUPPORT
 	select HAVE_FSP_GOP
-	select HAVE_FSP_LOGO_SUPPORT if RUN_FSP_GOP
 	select HAVE_SMI_HANDLER
 	select IDT_IN_EVERY_STAGE
 	select PARALLEL_MP_AP_WORK

src/soc/intel/apollolake/Kconfig

@@ -26,7 +26,6 @@ config SOC_INTEL_APOLLOLAKE
 	select HAVE_CF9_RESET_PREPARE
 	select HAVE_DPTF_EISA_HID
 	select HAVE_FSP_GOP
-	select HAVE_FSP_LOGO_SUPPORT
 	select HAVE_INTEL_FSP_REPO if !SOC_INTEL_GEMINILAKE
 	select HAVE_SMI_HANDLER
 	select INTEL_DESCRIPTOR_MODE_CAPABLE

src/soc/intel/cannonlake/Kconfig

@@ -19,7 +19,6 @@ config SOC_INTEL_CANNONLAKE_BASE
 	select GENERIC_GPIO_LIB
 	select HAVE_DPTF_EISA_HID
 	select HAVE_FSP_GOP
-	select HAVE_FSP_LOGO_SUPPORT
 	select HAVE_HYPERTHREADING
 	select HAVE_INTEL_FSP_REPO
 	select HAVE_SMI_HANDLER

src/soc/intel/meteorlake/Kconfig

@@ -25,7 +25,6 @@ config SOC_INTEL_METEORLAKE
 	select GENERIC_GPIO_LIB
 	select HAVE_DEBUG_RAM_SETUP
 	select HAVE_FSP_GOP
-	select HAVE_FSP_LOGO_SUPPORT if RUN_FSP_GOP
 	select HAVE_HYPERTHREADING
 	select HAVE_INTEL_COMPLIANCE_TEST_MODE
 	select HAVE_SMI_HANDLER

src/soc/intel/pantherlake/Kconfig

@@ -24,7 +24,6 @@ config SOC_INTEL_PANTHERLAKE_BASE
 	select HAVE_DEBUG_RAM_SETUP
 	select HAVE_ESOL_SUPPORT_FOR_LOW_BATTERY_INDICATOR if CHROMEOS_ENABLE_ESOL
 	select HAVE_FSP_GOP
-	select HAVE_FSP_LOGO_SUPPORT if RUN_FSP_GOP
 	select HAVE_HYPERTHREADING
 	select HAVE_INTEL_COMPLIANCE_TEST_MODE
 	select HAVE_SMI_HANDLER

src/soc/intel/skylake/Kconfig

@@ -15,7 +15,6 @@ config SOC_INTEL_COMMON_SKYLAKE_BASE
 	select FSP_M_XIP
 	select GENERIC_GPIO_LIB
 	select HAVE_FSP_GOP
-	select HAVE_FSP_LOGO_SUPPORT
 	select HAVE_HYPERTHREADING
 	select HAVE_INTEL_FSP_REPO
 	select INTEL_CAR_NEM_ENHANCED