From c8f086711c6ae2db70fc8e0d84b54f5952fbe0ad Mon Sep 17 00:00:00 2001 From: Julius Werner Date: Fri, 25 Oct 2013 17:49:26 -0700 Subject: [PATCH] tegra124: Set Tx FIFO threshold value to recommended setting This is essentially a direct port of CL:174505. It sets the EHCI controllers Tx FIFO threshold setting to the recommended value for HOST mode, which seems to help prevent FIFO underruns between the memory/AHB and the host controller. This is necessary to get larger OUT transfers to work, but there are still a few more general clock changes concerning other AHB problems needed before they will really be usable. BUG=None TEST=None Change-Id: I12783ba0a986678715d42e3d798756fa3d1ad690 Signed-off-by: Julius Werner Reviewed-on: https://chromium-review.googlesource.com/175200 Reviewed-by: Gabe Black --- src/soc/nvidia/tegra/usb.c | 15 ++++++++------- 1 file changed, 8 insertions(+), 7 deletions(-) diff --git a/src/soc/nvidia/tegra/usb.c b/src/soc/nvidia/tegra/usb.c index 0a3434fb0d..39477e17d3 100644 --- a/src/soc/nvidia/tegra/usb.c +++ b/src/soc/nvidia/tegra/usb.c @@ -93,13 +93,13 @@ void usb_setup_utmip(struct usb_ctlr *usb) } /* - * Tegra EHCI controllers need their usb_mode and lpm_ctrl registers initialized - * after every EHCI reset and before any other actions (such as Run/Stop bit) - * are taken. We reset the controller here, set those registers and rely on the - * fact that libpayload doesn't reset EHCI controllers on initialization for - * whatever weird reason. This is ugly, fragile, and I really don't like it, but - * making this work will require an ugly hack one way or another so we might as - * well take the path of least resistance for now. + * Tegra EHCI controllers need their usb_mode, lpm_ctrl and tx_fill_tuning + * registers initialized after every EHCI reset and before any other actions + * (such as Run/Stop bit) are taken. We reset the controller here, set those + * registers and rely on the fact that libpayload doesn't reset EHCI controllers + * on initialization for whatever weird reason. This is ugly, fragile, and I + * really don't like it, but making this work will require an ugly hack one way + * or another so we might as well take the path of least resistance for now. */ void usb_ehci_reset_and_prepare(struct usb_ctlr *usb, enum usb_phy_type type) { @@ -117,4 +117,5 @@ void usb_ehci_reset_and_prepare(struct usb_ctlr *usb, enum usb_phy_type type) write32(3 << 0, &usb->usb_mode); /* Controller mode: HOST */ write32(type << 29, &usb->lpm_ctrl); /* Parallel transceiver selct */ + write32(0x10 << 16, &usb->tx_fill_tuning); /* Tx FIFO Burst thresh */ }