soc/amd/glinda: Select SOC_FILL_CPU_CACHE_INFO

Use soc_fill_cpu_cache_info implementation to for computing L3 cache
size accurately for Glinda SoC.

Change-Id: I2827508ec0ae5f16d609e1bc76c00eb376a7b71b
Signed-off-by: Naresh Solanki <naresh.solanki@9elements.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/87222
Reviewed-by: Matt DeVillier <matt.devillier@gmail.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
This commit is contained in:
Naresh Solanki 2025-04-09 02:07:25 +05:30 committed by Felix Held
commit c82f5fe133

View file

@ -81,6 +81,7 @@ config SOC_AMD_GLINDA
select SOC_AMD_COMMON_FSP_PCI # TODO: Check if this is still correct
select SOC_AMD_COMMON_FSP_PRELOAD_FSPS
select SOC_AMD_COMMON_ROMSTAGE_LEGACY_DMA_FIXUP
select SOC_FILL_CPU_CACHE_INFO
select SSE2
select UDK_2017_BINDING
select USE_DDR5