diff --git a/arch/x86/linuxbios_table.c b/arch/x86/linuxbios_table.c
index 7f836b37bc..982d335a98 100644
--- a/arch/x86/linuxbios_table.c
+++ b/arch/x86/linuxbios_table.c
@@ -25,6 +25,7 @@
 #include <device/device.h>
 #include <tables.h>
 #include <mc146818rtc.h>
+#include <lib.h>
 //#include <cpu/cpu.h>
 //#include <pirq_routing.h>
 //#include <smp/mpspec.h>
@@ -159,7 +160,7 @@ void lb_strings(struct lb_header *header)
 		{ LB_TAG_ASSEMBLER,      (const u8 *)LINUXBIOS_ASSEMBLER      },
 	};
 	unsigned int i;
-	for(i = 0; i < sizeof(strings)/sizeof(strings[0]); i++) {
+	for(i = 0; i < ARRAY_SIZE(strings); i++) {
 		struct lb_string *rec;
 		size_t len;
 		rec = (struct lb_string *)lb_new_record(header);
diff --git a/include/lib.h b/include/lib.h
index 859fc7dafe..a87a2057ef 100644
--- a/include/lib.h
+++ b/include/lib.h
@@ -21,6 +21,12 @@
 #ifndef LIB_H
 #define LIB_H
 
+/**
+ * Return the size of a given array, no matter of which data type
+ * the individual array elements are.
+ */
+#define ARRAY_SIZE(a) (sizeof(a) / sizeof((a)[0]))
+
 int log2(unsigned int n);
 
 void udelay(unsigned int usecs);
diff --git a/mainboard/artecgroup/dbe61/initram.c b/mainboard/artecgroup/dbe61/initram.c
index 0da0d10018..3bf1a73425 100644
--- a/mainboard/artecgroup/dbe61/initram.c
+++ b/mainboard/artecgroup/dbe61/initram.c
@@ -120,7 +120,7 @@ struct wmsr {
 static void dbe61_msr_init(void)
 {
 	int i;
-	for(i = 0; i < sizeof(dbe61_msr)/sizeof(dbe61_msr[0]); i++)
+	for (i = 0; i < ARRAY_SIZE(dbe61_msr); i++)
 		wrmsr(dbe61_msr[i].reg, dbe61_msr[i].msr);
 }
 
diff --git a/southbridge/amd/cs5536/cs5536.c b/southbridge/amd/cs5536/cs5536.c
index ebe63694c0..996c288c91 100644
--- a/southbridge/amd/cs5536/cs5536.c
+++ b/southbridge/amd/cs5536/cs5536.c
@@ -93,8 +93,6 @@ struct FLASH_DEVICE FlashInitTable[] = {
 	{FLASH_TYPE_NONE, 0, 0},	/* CS3, or Flash Device 3 */
 };
 
-#define FlashInitTableLen (sizeof(FlashInitTable)/sizeof(FlashInitTable[0]))
-
 u32 FlashPort[] = {
 	MDD_LBAR_FLSH0,
 	MDD_LBAR_FLSH1,
@@ -149,7 +147,7 @@ static void chipset_flash_setup(void)
 	int numEnabled = 0;
 
 	printk(BIOS_DEBUG, "chipset_flash_setup: Start\n");
-	for (i = 0; i < FlashInitTableLen; i++) {
+	for (i = 0; i < ARRAY_SIZE(FlashInitTable); i++) {
 		if (FlashInitTable[i].fType != FLASH_TYPE_NONE) {
 			printk(BIOS_DEBUG, "Enable CS%d\n", i);
 			/* we need to configure the memory/IO mask */
diff --git a/superio/winbond/w83627hf/superio.c b/superio/winbond/w83627hf/superio.c
index d67d256adf..1992dc30ed 100644
--- a/superio/winbond/w83627hf/superio.c
+++ b/superio/winbond/w83627hf/superio.c
@@ -22,6 +22,7 @@
  */
 
 #include <io.h>
+#include <lib.h>
 #include <device/device.h>
 #include <device/pnp.h>
 #include <console.h>
@@ -99,7 +100,7 @@ static void init_hwm(unsigned long base)
                                                                             
 	};
 
-	for(i = 0; i<  sizeof(hwm_reg_values)/sizeof(hwm_reg_values[0]); i+=3 ) { 
+	for (i = 0; i < ARRAY_SIZE(hwm_reg_values); i += 3) { 
 		reg = hwm_reg_values[i];	
 	 	value = pnp_read_index(base, reg);		
 		value &= 0xff & hwm_reg_values[i+1];
@@ -207,8 +208,7 @@ static struct pnp_info pnp_dev_info[] = {
 
 static void phase2_setup_scan_bus(struct device *dev)
 {
-	pnp_enable_devices(dev, &ops,
-		sizeof(pnp_dev_info)/sizeof(pnp_dev_info[0]), pnp_dev_info);
+	pnp_enable_devices(dev, &ops, ARRAY_SIZE(pnp_dev_info), pnp_dev_info);
 }
 
 static struct device_operations ops = {