From c8199f26e0db8276f1898791422605265709625e Mon Sep 17 00:00:00 2001
From: Matt DeVillier <matt.devillier@gmail.com>
Date: Sat, 10 May 2025 16:57:25 -0500
Subject: [PATCH] soc/intel/skylake: Add/use enums for IGD config

Add enums for the IGD aperture size and DVMT/stolen memory size, as is
done for newer SoCs. Use these enums rather than their int values
when configuring the IGD.

Change-Id: I16dbfcd1862ea0c43c62eef59e35ca144a1b2715
Signed-off-by: Matt DeVillier <matt.devillier@gmail.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/87624
Reviewed-by: Maxim Polyakov <max.senia.poliak@gmail.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
---
 src/soc/intel/skylake/chip.h                | 15 +++++++++++++++
 src/soc/intel/skylake/include/soc/cfr.h     | 19 ++++++++++---------
 src/soc/intel/skylake/romstage/fsp_params.c | 10 ++++++++--
 3 files changed, 33 insertions(+), 11 deletions(-)

diff --git a/src/soc/intel/skylake/chip.h b/src/soc/intel/skylake/chip.h
index d12c3eb218..8edb08eb35 100644
--- a/src/soc/intel/skylake/chip.h
+++ b/src/soc/intel/skylake/chip.h
@@ -30,6 +30,21 @@ enum skylake_i2c_voltage {
 	I2C_VOLTAGE_1V8
 };
 
+/* Gfx related */
+enum igd_dvmt50_pre_alloc {
+	IGD_SM_0MB = 0x00,
+	IGD_SM_32MB = 0x01,
+	IGD_SM_64MB = 0x02,
+	IGD_SM_96MB = 0x03,
+	IGD_SM_128MB = 0x04,
+};
+
+enum igd_aperture_size {
+	IGD_AP_SZ_128MB = 0x00,
+	IGD_AP_SZ_256MB = 0x01,
+	IGD_AP_SZ_512MB = 0x02,
+};
+
 struct soc_intel_skylake_config {
 	/* Common struct containing soc config data required by common code */
 	struct soc_intel_common_config common_soc_config;
diff --git a/src/soc/intel/skylake/include/soc/cfr.h b/src/soc/intel/skylake/include/soc/cfr.h
index ad5c6f6f53..52899015d3 100644
--- a/src/soc/intel/skylake/include/soc/cfr.h
+++ b/src/soc/intel/skylake/include/soc/cfr.h
@@ -8,6 +8,7 @@
 #define SKYLAKE_CFR_H
 
 #include <drivers/option/cfr_frontend.h>
+#include <soc/soc_chip.h>
 
 /* FSP hyperthreading */
 static const struct sm_object hyper_threading = SM_DECLARE_ENUM({
@@ -26,11 +27,11 @@ static const struct sm_object igd_aperture = SM_DECLARE_ENUM({
 	.opt_name	= "igd_aperture_size",
 	.ui_name	= "IGD Aperture Size",
 	.ui_helptext	= "Select the Aperture Size",
-	.default_value	= 1,
+	.default_value	= IGD_AP_SZ_256MB,
 	.values		= (const struct sm_enum_value[]) {
-				{ "128 MB",		0	},
-				{ "256 MB",		1	},
-				{ "512 MB",		2	},
+				{ "128 MB",	IGD_AP_SZ_128MB	},
+				{ "256 MB",	IGD_AP_SZ_256MB	},
+				{ "512 MB",	IGD_AP_SZ_512MB	},
 				SM_ENUM_VALUE_END		},
 });
 
@@ -39,12 +40,12 @@ static const struct sm_object igd_dvmt = SM_DECLARE_ENUM({
 	.opt_name	= "igd_dvmt_prealloc",
 	.ui_name	= "IGD DVMT Size",
 	.ui_helptext	= "Size of memory preallocated for internal graphics",
-	.default_value	= 2,
+	.default_value	= IGD_SM_64MB,
 	.values		= (const struct sm_enum_value[]) {
-				{ "32 MB",		1	},
-				{ "64 MB",		2	},
-				{ "96 MB",		3	},
-				{ "128 MB",		4	},
+				{ "32 MB",	IGD_SM_32MB	},
+				{ "64 MB",	IGD_SM_64MB	},
+				{ "96 MB",	IGD_SM_96MB	},
+				{ "128 MB",	IGD_SM_128MB	},
 				SM_ENUM_VALUE_END		},
 });
 
diff --git a/src/soc/intel/skylake/romstage/fsp_params.c b/src/soc/intel/skylake/romstage/fsp_params.c
index 906301dd1f..02123f837a 100644
--- a/src/soc/intel/skylake/romstage/fsp_params.c
+++ b/src/soc/intel/skylake/romstage/fsp_params.c
@@ -116,8 +116,14 @@ static void soc_primary_gfx_config_params(FSP_M_CONFIG *m_cfg,
 	 *
 	 * If disabled, don't reserve memory for it.
 	 */
-	m_cfg->IgdDvmt50PreAlloc = m_cfg->InternalGfx ? get_uint_option("igd_dvmt_prealloc", 2) : 0;
-	m_cfg->ApertureSize = get_uint_option("igd_aperture_size", 1);
+	if (m_cfg->InternalGfx) {
+		/* IGD is enabled, set IGD stolen size to 64MB. */
+		m_cfg->IgdDvmt50PreAlloc = get_uint_option("igd_dvmt_prealloc", IGD_SM_64MB);
+		m_cfg->ApertureSize = get_uint_option("igd_aperture_size", IGD_AP_SZ_256MB);
+	} else {
+		/* IGD is disabled, skip IGD init in FSP. */
+		m_cfg->IgdDvmt50PreAlloc = 0;
+	}
 
 	m_cfg->PrimaryDisplay = config->PrimaryDisplay;
 }