soc/qualcomm: Add support for QUPV3 wrapper 3

The X1P42100 SoC and future Qualcomm platforms support more than two
QUPV3 wrappers. This patch extends the common Qualcomm drivers to
handle a third wrapper (QUP_WRAP3).

Details:
- clock.c: Update clock_configure_dfsr_table() to support wrap3.
- qupv3_config.c: Initialize the third wrapper if defined.
- addressmap.h: Add QUP_WRAP3_BASE defines for sc7180, sc7280,
  and x1p42100 (defaulting to 0 for older chips).

Change-Id: I58ed310c65319f26ec029071d170237130d9ba19
Signed-off-by: Subrata Banik <subratabanik@google.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/91900
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Kapil Porwal <kapilporwal@google.com>

src/soc/qualcomm/common/clock.c

@@ -205,6 +205,11 @@ void clock_configure_dfsr_table(int qup, struct clock_freq_config *clk_cfg,
 	unsigned int idx, s = qup % QUP_WRAP1_S0;
 	uint32_t reg_val;
 
+#if QUP_WRAP3_BASE
+	if (qup >= QUP_WRAP3_S0)
+		qup_clk = &gcc->qup_wrap3_s[s];
+	else
+#endif
 #if QUP_WRAP2_BASE
 	if (qup >= QUP_WRAP2_S0)
 		qup_clk = &gcc->qup_wrap2_s[s];

src/soc/qualcomm/common/qupv3_config.c

@@ -264,4 +264,6 @@ void qupv3_fw_init(void)
 	qup_common_init(QUP_WRAP1_BASE);
 	if (QUP_WRAP2_BASE)
 		qup_common_init(QUP_WRAP2_BASE);
+	if (QUP_WRAP3_BASE)
+		qup_common_init(QUP_WRAP3_BASE);
 }

src/soc/qualcomm/sc7180/include/soc/addressmap.h

@@ -37,6 +37,9 @@
 /* QUPV3_2 - Dummy Entry */
 #define QUP_WRAP2_BASE			0x00000000
 
+/* QUPV3_3 - Dummy Entry */
+#define QUP_WRAP3_BASE			0x00000000
+
 /*
  * USB BASE ADDRESSES
  */

src/soc/qualcomm/sc7280/include/soc/addressmap.h

@@ -58,6 +58,9 @@
 /* QUPV3_2 - Dummy Entry */
 #define QUP_WRAP2_BASE			0x00000000
 
+/* QUPV3_3 - Dummy Entry */
+#define QUP_WRAP3_BASE			0x00000000
+
 #define EPSSTOP_EPSS_TOP		0x18598000
 #define EPSSFAST_BASE_ADDR		0x18580000
 

src/soc/qualcomm/x1p42100/include/soc/addressmap.h

@@ -98,6 +98,9 @@
 #define QUP_WRAP2_BASE			0x008C0000
 #define QUP_2_GSI_BASE			0x00804000
 
+/* QUPV3_3 - Dummy Entry */
+#define QUP_WRAP3_BASE			0x00000000
+
 /* USB BASE ADDRESSES */
 #define HS_USB_SS0_PHY_BASE		0x00FD3000
 #define HS_USB_SS1_PHY_BASE		0x00FD9000