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UPSTREAM: soc/intel/skylake: move i2c voltage config to own variable

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In preparation of merging the lpss i2c config structures on
apollolake and skylake move the i2c voltage variable to its
own field. It makes refactoring things easier, and then there's
no reason for a separate SoC specific i2c config structure.

BUG=chrome-os-partner:58889
BRANCH=None
TEST=None

Signed-off-by: Aaron Durbin <adurbin@chromium.org>
Reviewed-on: https://review.coreboot.org/17347
Reviewed-by: Furquan Shaikh <furquan@google.com>
Tested-by: build bot (Jenkins)
Reviewed-by: Duncan Laurie <dlaurie@chromium.org>

Change-Id: Ibcc3cba9bac3b5779351b673bc0cc7671d127f24
Reviewed-on: https://chromium-review.googlesource.com/411422
Commit-Ready: Furquan Shaikh <furquan@chromium.org>
Tested-by: Furquan Shaikh <furquan@chromium.org>
Reviewed-by: Aaron Durbin <adurbin@chromium.org>
This commit is contained in:
Aaron Durbin 2016-11-09 17:04:15 -06:00 • committed by chrome-bot
commit c78e679b4f
8 changed files with 13 additions and 13 deletions
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2
src/mainboard/intel/kunimitsu/devicetree.cb
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@ -164,7 +164,7 @@ chip soc/intel/skylake
register "usb3_ports[2]" = "USB3_PORT_DEFAULT" # Type-A Port (card)
register "usb3_ports[3]" = "USB3_PORT_DEFAULT" # Type-A Port (board)
register "i2c[4].voltage" = "I2C_VOLTAGE_1V8" # I2C4 is 1.8V
register "i2c_voltage[4]" = "I2C_VOLTAGE_1V8" # I2C4 is 1.8V
# Must leave UART0 enabled or SD/eMMC will not work as PCI
register "SerialIoDevMode" = "{ \