erebion/coreboot
1
0
Fork 0
Code Issues Pull requests Projects Releases Packages Wiki Activity Actions

drivers/intel/mipi_camera: Document more SSDB fields

Browse source 
Add comments for the tail of `struct intel_ssdb`, naming the camera
position, voltage rail, PPR, flash, PHY, lane, and external MCLK fields
instead of treating them as an opaque reserved block. Keeps the struct
aligned with the ACPI blob while making each byte’s meaning explicit.

Change-Id: Id9ae2bf77e901ef0f88b6f51985b59d41c5529d9
Signed-off-by: Matt DeVillier <matt.devillier@gmail.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/90189
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Sean Rhodes <sean@starlabs.systems>
This commit is contained in:
Matt DeVillier 2025-11-09 18:18:21 -06:00
commit c6ed8c91fb
1 changed files with 12 additions and 3 deletions
Download patch file Download diff file Expand all files Collapse all files

15
src/drivers/intel/mipi_camera/ssdb.h
View file

@ -192,9 +192,18 @@ struct intel_ssdb {
uint8_t mipi_data_format; /* MIPI data format */
uint8_t silicon_version; /* Silicon version */
uint8_t customer_id; /* Customer ID */
uint8_t mclk_port;
uint8_t reserved[13]; /* Pads SSDB out so the binary blob in ACPI is
the same size as seen on other firmwares.*/
uint8_t mclk_port; /* MCLK port */
uint8_t camera_position; /* Physical position on camera card and PMIC
assignment. See enum cam_position */
uint8_t voltage_rail; /* Number of voltage rails required by sensor */
uint8_t ppr_value; /* Peak Power Rating value for sensor power mgmt */
uint8_t ppr_unit; /* PPR unit multiplier */
uint8_t flash_id; /* Flash ID: 0: default, 1: flash support */
uint8_t phy_config; /* PHY config: 0: DPHY, 1: CPHY */
uint8_t lane_config; /* 0: 1 lane, 1: 2 lanes,
2: 3 lanes, 3: 4 lanes */
uint8_t use_ext_mclk_source; /* 0: internal, 1: external */
uint8_t reserved[5]; /* Padding to match SSDB_SIZE */
} __packed;
_Static_assert(sizeof(struct intel_ssdb) == SSDB_SIZE,
"SSDB structure size must match SSDB_SIZE");