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mb/google/skyrim: Configure Pen Detect device

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Enable pen garage. Pen detect is active low.

BUG=b:229168203
TEST:Build and boot to OS in skyrim. Evtest work as expected
Input driver version is 1.0.1
Input device ID: bus 0x19 vendor 0x1 product 0x1 version 0x100
Input device name: "PRP0001:00"
    Supported events:
  Event type 0 (EV_SYN)
  Event type 5 (EV_SW)
    Event code 15 (SW_PEN_INSERTED) state 1
Properties:
Testing ... (interrupt to exit)
Event: time 1649922170.578779, type 5 (EV_SW), code 15 (SW_PEN_INSERTED), value 0
Event: time 1649922170.578779, -------------- SYN_REPORT ------------
Event: time 1649922172.070740, type 5 (EV_SW), code 15 (SW_PEN_INSERTED), value 1

Signed-off-by: Ian Feng <ian_feng@compal.corp-partner.google.com>
Change-Id: I3bb07af6aebdc355a73148d8be79b1014147f61d
Reviewed-on: https://review.coreboot.org/c/coreboot/+/63633
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Raul Rangel <rrangel@chromium.org>
Reviewed-by: Karthik Ramasubramanian <kramasub@google.com>
This commit is contained in:
Ian Feng 2022-04-14 17:02:35 +08:00 • committed by Felix Held
commit c6d6c88fcf
2 changed files with 13 additions and 0 deletions
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1
src/mainboard/google/skyrim/Kconfig
View file

@ -18,6 +18,7 @@ config BOARD_SPECIFIC_OPTIONS
def_bool y
select AMD_SOC_CONSOLE_UART
select BOARD_ROMSIZE_KB_16384
select DRIVERS_GENERIC_GPIO_KEYS
select DRIVERS_I2C_GENERIC
select DRIVERS_I2C_HID
select DRIVERS_WIFI_GENERIC

12
src/mainboard/google/skyrim/variants/skyrim/overridetree.cb
View file

@ -84,5 +84,17 @@ chip soc/amd/sabrina
register "hid_desc_reg_offset" = "0x01"
device i2c 5d on end
end
chip drivers/generic/gpio_keys
register "name" = ""PENH""
register "gpio" = "ACPI_GPIO_INPUT_ACTIVE_LOW(GPIO_3)"
register "key.dev_name" = ""EJCT""
register "key.wakeup_event_action" = "EV_ACT_DEASSERTED"
register "key.linux_code" = "SW_PEN_INSERTED"
register "key.linux_input_type" = "EV_SW"
register "key.label" = ""pen_eject""
register "key.debounce_interval" = "100"
register "key.wakeup_route" = "WAKEUP_ROUTE_GPIO_IRQ"
device generic 0 on end
end
end # I2C1
end # chip soc/amd/sabrina