diff --git a/src/soc/intel/broadwell/broadwell/cpu.h b/src/soc/intel/broadwell/broadwell/cpu.h index 0316095dbf..0f6f593736 100644 --- a/src/soc/intel/broadwell/broadwell/cpu.h +++ b/src/soc/intel/broadwell/broadwell/cpu.h @@ -27,13 +27,15 @@ #define HASWELL_FAMILY_ULT 0x40650 #define BROADWELL_FAMILY_ULT 0x306d0 -/* Haswell CPU steppings */ -#define HASWELL_STEPPING_MOBILE_A0 1 -#define HASWELL_STEPPING_MOBILE_B0 2 -#define HASWELL_STEPPING_MOBILE_C0 3 -#define HASWELL_STEPPING_MOBILE_D0 4 -#define HASWELL_STEPPING_ULT_B0 0 -#define HASWELL_STEPPING_ULT_C0 1 +/* Supported CPUIDs */ +#define CPUID_HASWELL_A0 0x306c1 +#define CPUID_HASWELL_B0 0x306c2 +#define CPUID_HASWELL_C0 0x306c3 +#define CPUID_HASWELL_ULT_B0 0x40650 +#define CPUID_HASWELL_ULT 0x40651 +#define CPUID_HASWELL_HALO 0x40661 +#define CPUID_BROADWELL_C0 0x306d2 +#define CPUID_BROADWELL_D0 0x306d3 /* CPU bus clock is fixed at 100MHz */ #define CPU_BCLK 100 diff --git a/src/soc/intel/broadwell/broadwell/pch.h b/src/soc/intel/broadwell/broadwell/pch.h index 76de7fb93e..e677215c7f 100644 --- a/src/soc/intel/broadwell/broadwell/pch.h +++ b/src/soc/intel/broadwell/broadwell/pch.h @@ -21,6 +21,22 @@ #ifndef _BROADWELL_PCH_H_ #define _BROADWELL_PCH_H_ +/* Haswell ULT Pch (LynxPoint-LP) */ +#define PCH_LPT_LP_SAMPLE 0x9c41 +#define PCH_LPT_LP_PREMIUM 0x9c43 +#define PCH_LPT_LP_MAINSTREAM 0x9c45 +#define PCH_LPT_LP_VALUE 0x9c47 + +/* Broadwell PCH (WildatPoint) */ +#define PCH_WPT_HSW_U_SAMPLE 0x9cc1 +#define PCH_WPT_BDW_U_SAMPLE 0x9cc2 +#define PCH_WPT_BDW_U_PREMIUM 0x9cc3 +#define PCH_WPT_BDW_U_BASE 0x9cc5 +#define PCH_WPT_BDW_Y_SAMPLE 0x9cc6 +#define PCH_WPT_BDW_Y_PREMIUM 0x9cc7 +#define PCH_WPT_BDW_Y_BASE 0x9cc9 +#define PCH_WPT_BDW_H 0x9ccb + /* Power Management Control and Status */ #define PCH_PCS 0x84 #define PCH_PCS_PS_D3HOT 3 diff --git a/src/soc/intel/broadwell/broadwell/systemagent.h b/src/soc/intel/broadwell/broadwell/systemagent.h index 7a8e1b26b8..27c06f7608 100644 --- a/src/soc/intel/broadwell/broadwell/systemagent.h +++ b/src/soc/intel/broadwell/broadwell/systemagent.h @@ -23,6 +23,18 @@ #include +#define SA_IGD_OPROM_VENDEV 0x80860406 + +#define IGD_HASWELL_ULT_GT1 0x0a06 +#define IGD_HASWELL_ULT_GT2 0x0a16 +#define IGD_HASWELL_ULT_GT3 0x0a26 +#define IGD_BROADWELL_U_GT1 0x1606 +#define IGD_BROADWELL_U_GT2 0x1616 +#define IGD_BROADWELL_U_GT3_15W 0x1626 +#define IGD_BROADWELL_U_GT3_28W 0x162b +#define IGD_BROADWELL_Y_GT2 0x161e +#define IGD_BROADWELL_H_GT2 0x1612 +#define IGD_BROADWELL_H_GT3 0x1622 /* Device 0:0.0 PCI configuration space */ diff --git a/src/soc/intel/broadwell/cpu.c b/src/soc/intel/broadwell/cpu.c index b287bd82b2..53ca6b934f 100644 --- a/src/soc/intel/broadwell/cpu.c +++ b/src/soc/intel/broadwell/cpu.c @@ -762,6 +762,18 @@ static struct mp_flight_record mp_steps[] = { }; void bsp_init_and_start_aps(struct bus *cpu_bus) + +static struct cpu_device_id cpu_table[] = { + { X86_VENDOR_INTEL, CPUID_HASWELL_ULT }, + { X86_VENDOR_INTEL, CPUID_BROADWELL_C0 }, + { X86_VENDOR_INTEL, CPUID_BROADWELL_D0 }, + { 0, 0 }, +}; + +static const struct cpu_driver driver __cpu_driver = { + .ops = &cpu_dev_ops, + .id_table = cpu_table, +}; { int num_threads; int num_cores; @@ -808,18 +820,3 @@ void bsp_init_and_start_aps(struct bus *cpu_bus) static struct device_operations cpu_dev_ops = { .init = haswell_init, }; - -static struct cpu_device_id cpu_table[] = { - { X86_VENDOR_INTEL, 0x306c1 }, /* Intel Haswell 4+2 A0 */ - { X86_VENDOR_INTEL, 0x306c2 }, /* Intel Haswell 4+2 B0 */ - { X86_VENDOR_INTEL, 0x40650 }, /* Intel Haswell ULT B0 */ - { X86_VENDOR_INTEL, 0x40651 }, /* Intel Haswell ULT B1 */ - { 0, 0 }, -}; - -static const struct cpu_driver driver __cpu_driver = { - .ops = &cpu_dev_ops, - .id_table = cpu_table, - .cstates = cstate_map, -}; - diff --git a/src/soc/intel/broadwell/igd.c b/src/soc/intel/broadwell/igd.c index c7a46df150..acde73beac 100644 --- a/src/soc/intel/broadwell/igd.c +++ b/src/soc/intel/broadwell/igd.c @@ -516,18 +516,16 @@ static struct device_operations gma_func0_ops = { }; static const unsigned short pci_device_ids[] = { - 0x0402, /* Desktop GT1 */ - 0x0412, /* Desktop GT2 */ - 0x0422, /* Desktop GT3 */ - 0x0406, /* Mobile GT1 */ - 0x0416, /* Mobile GT2 */ - 0x0426, /* Mobile GT3 */ - 0x0d16, /* Mobile 4+3 GT1 */ - 0x0d26, /* Mobile 4+3 GT2 */ - 0x0d36, /* Mobile 4+3 GT3 */ - 0x0a06, /* ULT GT1 */ - 0x0a16, /* ULT GT2 */ - 0x0a26, /* ULT GT3 */ + IGD_HASWELL_ULT_GT1, + IGD_HASWELL_ULT_GT2, + IGD_HASWELL_ULT_GT3, + IGD_BROADWELL_U_GT1, + IGD_BROADWELL_U_GT2, + IGD_BROADWELL_U_GT3_15W, + IGD_BROADWELL_U_GT3_28W, + IGD_BROADWELL_Y_GT2, + IGD_BROADWELL_H_GT2, + IGD_BROADWELL_H_GT3, 0, }; diff --git a/src/soc/intel/broadwell/lpc.c b/src/soc/intel/broadwell/lpc.c index dd7d84055d..fdccd0cbd2 100644 --- a/src/soc/intel/broadwell/lpc.c +++ b/src/soc/intel/broadwell/lpc.c @@ -768,24 +768,21 @@ static struct device_operations device_ops = { .ops_pci = &pci_ops, }; - -/* IDs for LPC device of Intel 8 Series Chipset (Lynx Point) */ static const unsigned short pci_device_ids[] = { - 0x8c41, /* Mobile Full Featured Engineering Sample. */ - 0x8c42, /* Desktop Full Featured Engineering Sample. */ - 0x8c44, /* Z87 SKU */ - 0x8c46, /* Z85 SKU */ - 0x8c49, /* HM86 SKU */ - 0x8c4a, /* H87 SKU */ - 0x8c4b, /* HM87 SKU */ - 0x8c4c, /* Q85 SKU */ - 0x8c4e, /* Q87 SKU */ - 0x8c4f, /* QM87 SKU */ - 0x9c41, /* LP Full Featured Engineering Sample */ - 0x9c43, /* LP Premium SKU */ - 0x9c45, /* LP Mainstream SKU */ - 0x9c47, /* LP Value SKU */ - 0 }; + PCH_LPT_LP_SAMPLE, + PCH_LPT_LP_PREMIUM, + PCH_LPT_LP_MAINSTREAM, + PCH_LPT_LP_VALUE, + PCH_WPT_HSW_U_SAMPLE, + PCH_WPT_BDW_U_SAMPLE, + PCH_WPT_BDW_U_PREMIUM, + PCH_WPT_BDW_U_BASE, + PCH_WPT_BDW_Y_SAMPLE, + PCH_WPT_BDW_Y_PREMIUM, + PCH_WPT_BDW_Y_BASE, + PCH_WPT_BDW_H, + 0 +}; static const struct pci_driver pch_lpc __pci_driver = { .ops = &device_ops,