erebion/coreboot
1
0
Fork 0
Code Issues Pull requests Projects Releases Packages Wiki Activity Actions

These are changes we are making so that serial startup can be done in

Browse source 
stage 1. This is part of a general change in startup due to the move
from V2 to V3. 

The LX is complex and in this case much work must be done, we don't
expect all platforms to be this way. 

We will probably be changined these names from eary_* to stage1.c
to make it easier for people to know what's going on.

Signed-off-by: Ronald G. Minnich <rminnich@gmail.com>
Acked-by: Stefan Reinauer <stepan@coresystems.de>



git-svn-id: svn://coreboot.org/repository/LinuxBIOSv3@406 f3766cd6-281f-0410-b1cd-43a5c92072e9
This commit is contained in:
Ronald G. Minnich 2007-06-28 23:59:40 +00:00
commit c61a113dfb
7 changed files with 136 additions and 69 deletions
Download patch file Download diff file Expand all files Collapse all files

3
arch/x86/Makefile
View file

@ -92,7 +92,8 @@ endif
STAGE0_OBJ := $(patsubst %,$(obj)/lib/%,$(STAGE0_LIB_OBJ)) \
$(patsubst %,$(obj)/arch/x86/%,$(STAGE0_ARCH_X86_OBJ)) \
$(patsubst %,$(obj)/arch/x86/%,$(STAGE0_CAR_OBJ))
$(patsubst %,$(obj)/arch/x86/%,$(STAGE0_CAR_OBJ)) \
$(STAGE0_MAINBOARD_OBJ)
$(obj)/stage0.init: $(STAGE0_OBJ)
$(Q)# We need to be careful. If stage0.o gets bigger than

12
arch/x86/cachemain.c
View file

@ -27,9 +27,9 @@
/* these prototypes should go into headers */
void uart_init(void);
void console_init(void);
void die(const char *msg);
int find_file(struct mem_file *archive, char *filename, struct mem_file *result);
void early_init(void);
// Is this value correct?
#define DCACHE_RAM_SIZE 0x8000
@ -46,14 +46,6 @@ static void stop_ap(void)
post_code(0xf0);
}
static void enable_superio(void)
{
// nothing yet
beep_short(); // FIXME
post_code(0xf1);
beep_long(); // FIXME
}
static void enable_rom(void)
{
// nothing here yet
@ -90,7 +82,7 @@ void stage1_main(u32 bist)
// We have cache as ram running and can start executing code in C.
//
enable_superio();
early_init();
//
uart_init(); // initialize serial port

71
arch/x86/geodelx/early_init.c Normal file
View file

@ -0,0 +1,71 @@
/*
* This file is part of the LinuxBIOS project.
*
* Copyright (C) 2006 Indrek Kruusa <indrek.kruusa@artecdesign.ee>
* Copyright (C) 2006 Ronald G. Minnich <rminnich@gmail.com>
* Copyright (C) 2007 Advanced Micro Devices, Inc.
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
* the Free Software Foundation; either version 2 of the License, or
* (at your option) any later version.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
* You should have received a copy of the GNU General Public License
* along with this program; if not, write to the Free Software
* Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
*/
#include <types.h>
#include <lib.h>
#include <console.h>
#include <device/device.h>
#include <device/pci.h>
#include <string.h>
#include <msr.h>
#include <io.h>
#include <amd_geodelx.h>
#include <spd.h>
/**
* geodelx_msr_init Set up Geode LX registers for sane behaviour. Set
* all low memory (under 1MB) to write back. Do some setup for cache
* as ram as well.
*/
void geodelx_msr_init(void)
{
struct msr msr;
/* Setup access to the cache for under 1MB. */
msr.hi = 0x24fffc02;
msr.lo = 0x1000A000; /* 0-A0000 write back */
wrmsr(CPU_RCONF_DEFAULT, msr);
msr.hi = 0x0; /* write back */
msr.lo = 0x0;
wrmsr(CPU_RCONF_A0_BF, msr);
wrmsr(CPU_RCONF_C0_DF, msr);
wrmsr(CPU_RCONF_E0_FF, msr);
/* Setup access to the cache for under 640K. Note MC not setup yet. */
msr.hi = 0x20000000;
msr.lo = 0xfff80;
wrmsr(MSR_GLIU0 + 0x20, msr);
msr.hi = 0x20000000;
msr.lo = 0x80fffe0;
wrmsr(MSR_GLIU0 + 0x21, msr);
msr.hi = 0x20000000;
msr.lo = 0xfff80;
wrmsr(MSR_GLIU1 + 0x20, msr);
msr.hi = 0x20000000;
msr.lo = 0x80fffe0;
wrmsr(MSR_GLIU1 + 0x21, msr);
}

40
arch/x86/geodelx/geodelx.c
View file

@ -39,45 +39,6 @@
* and it sucks.
*/
/**
* geodelx_msr_init Set up Geode LX registers for sane behaviour. Set
* all low memory (under 1MB) to write back. Do some setup for cache
* as ram as well.
*/
void geodelx_msr_init(void)
{
struct msr msr;
/* Setup access to the cache for under 1MB. */
msr.hi = 0x24fffc02;
msr.lo = 0x1000A000; /* 0-A0000 write back */
wrmsr(CPU_RCONF_DEFAULT, msr);
msr.hi = 0x0; /* write back */
msr.lo = 0x0;
wrmsr(CPU_RCONF_A0_BF, msr);
wrmsr(CPU_RCONF_C0_DF, msr);
wrmsr(CPU_RCONF_E0_FF, msr);
/* Setup access to the cache for under 640K. Note MC not setup yet. */
msr.hi = 0x20000000;
msr.lo = 0xfff80;
wrmsr(MSR_GLIU0 + 0x20, msr);
msr.hi = 0x20000000;
msr.lo = 0x80fffe0;
wrmsr(MSR_GLIU0 + 0x21, msr);
msr.hi = 0x20000000;
msr.lo = 0xfff80;
wrmsr(MSR_GLIU1 + 0x20, msr);
msr.hi = 0x20000000;
msr.lo = 0x80fffe0;
wrmsr(MSR_GLIU1 + 0x21, msr);
}
/**
* start_time1 Starts Timer 1 for port 61 use. FIXME try to figure
* out what these values mean.
@ -97,6 +58,7 @@ void system_preinit(void)
start_timer1();
}
/* cpu bug management */
/**
*

9
mainboard/adl/msm800sev/Makefile
View file

@ -19,6 +19,12 @@
## Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
##
STAGE0_MAINBOARD_OBJ := $(obj)/superio/winbond/w83627hf/w83627hf_early_serial.o \
$(obj)/device/pnp_raw.o \
$(obj)/southbridge/amd/cs5536/cs5536_early_setup.o\
$(obj)/arch/x86/geodelx/early_init.o \
$(obj)/mainboard/$(MAINBOARDDIR)/early_init.o
$(obj)/linuxbios.vpd:
$(Q)printf " BUILD DUMMY VPD\n"
$(Q)dd if=/dev/zero of=$(obj)/linuxbios.vpd bs=256 count=1 $(SILENT)
@ -26,9 +32,6 @@ $(obj)/linuxbios.vpd:
INITRAM_OBJ = $(obj)/mainboard/$(MAINBOARDDIR)/initram.o \
$(obj)/northbridge/amd/geodelx/raminit.o \
$(obj)/southbridge/amd/cs5536/smbus_initram.o \
$(obj)/southbridge/amd/cs5536/cs5536_early_setup.o\
$(obj)/superio/winbond/w83627hf/w83627hf_early_serial.o\
$(obj)/device/pnp_raw.o \
$(obj)/arch/x86/geodelx/geodelx.o
$(obj)/linuxbios.initram: $(obj)/stage0.init $(obj)/stage0.o $(INITRAM_OBJ)

54
mainboard/adl/msm800sev/early_init.c Normal file
View file

@ -0,0 +1,54 @@
/*
* This file is part of the LinuxBIOS project.
*
* Copyright (C) 2007 Advanced Micro Devices, Inc.
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
* the Free Software Foundation; either version 2 of the License, or
* (at your option) any later version.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
* You should have received a copy of the GNU General Public License
* along with this program; if not, write to the Free Software
* Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
*/
#include <types.h>
#include <lib.h>
#include <console.h>
#include <post_code.h>
#include <device/device.h>
#include <device/pci.h>
#include <io.h>
#include <device/pnp.h>
#include <string.h>
#include <msr.h>
#include <io.h>
#include <amd_geodelx.h>
#include <southbridge/amd/cs5536/cs5536.h>
#include <superio/winbond/w83627hf/w83627hf.h>
#define SERIAL_DEV 0x30
int early_init(void)
{
void w83627hf_enable_serial(u8 dev, u8 serial, u16 iobase);
post_code(POST_START_OF_MAIN);
geodelx_msr_init();
cs5536_early_setup();
/* NOTE: must do this AFTER the early_setup!
* it is counting on some early MSR setup
* for cs5536
*/
cs5536_disable_internal_uart();
w83627hf_enable_serial(0x2e, 0x30, 0x3f8);
printk(BIOS_DEBUG, "Done %s\n", __FUNCTION__);
}

16
mainboard/adl/msm800sev/initram.c
View file

@ -32,9 +32,6 @@
#include <amd_geodelx.h>
#include <southbridge/amd/cs5536/cs5536.h>
#include <northbridge/amd/geodelx/raminit.h>
#include <superio/winbond/w83627hf/w83627hf.h>
#define SERIAL_DEV 0x30
#define MANUALCONF 0 /* Do automatic strapped PLL config */
#define PLLMSRHI 0x00001490 /* manual settings for the PLL */
@ -45,21 +42,8 @@
int main(void)
{
void done_cache_as_ram_main(void);
void w83627hf_enable_serial(u8 dev, u8 serial, u16 iobase);
post_code(POST_START_OF_MAIN);
system_preinit();
geodelx_msr_init();
cs5536_early_setup();
/* NOTE: must do this AFTER the early_setup!
* it is counting on some early MSR setup
* for cs5536
*/
cs5536_disable_internal_uart();
w83627hf_enable_serial(0x2e, 0x30, 0x3f8);
console_init();
pll_reset(MANUALCONF, PLLMSRHI, PLLMSRLO);