From c476c4d5b9f53f01c0f0b9673d3b9f0a29a6ae64 Mon Sep 17 00:00:00 2001 From: Hope Wang Date: Thu, 26 Dec 2024 17:50:55 +0800 Subject: [PATCH] soc/mediatek/mt8196: Delay 0.5ms after enabling PMIF SPMI SW interface The initialization process of SPMI requires a certain amount of time (0.5ms) to ensure all components are correctly configured and synchronized. Otherwise, if the SPMI calibration fails, it will result in the non-serial firmware failing to boot. TEST=Build pass, non-serial firmware boot ok. BUG=b:341054056 Change-Id: I63df384061e4ed2629238f1843decd18d1ad1ac4 Signed-off-by: Hope Wang Reviewed-on: https://review.coreboot.org/c/coreboot/+/85799 Tested-by: build bot (Jenkins) Reviewed-by: Yu-Ping Wu Reviewed-by: Yidi Lin --- src/soc/mediatek/mt8196/pmif_spmi.c | 2 ++ 1 file changed, 2 insertions(+) diff --git a/src/soc/mediatek/mt8196/pmif_spmi.c b/src/soc/mediatek/mt8196/pmif_spmi.c index d00afe115d..e646816774 100644 --- a/src/soc/mediatek/mt8196/pmif_spmi.c +++ b/src/soc/mediatek/mt8196/pmif_spmi.c @@ -1,6 +1,7 @@ /* SPDX-License-Identifier: GPL-2.0-only OR MIT */ #include +#include #include #include #include @@ -285,6 +286,7 @@ static void pmif_spmi_enable_swinf(struct pmif *arb) { write32(&arb->mtk_pmif->inf_en, PMIF_SPMI_SW_CHAN); write32(&arb->mtk_pmif->arb_en, PMIF_SPMI_SW_CHAN); + udelay(500); printk(BIOS_INFO, "%s done\n", __func__); }