erebion/coreboot
1
0
Fork 0
Code Issues Pull requests Projects Releases Packages Wiki Activity Actions

soc/intel/cannonlake: Add ability to disable Heci1

Browse source 
Decide if HECI1 should be hidden prior to boot to OS.

BUG=none
TEST=Boot to OS, verify if Heci1 is disabled on hatch system
     using FSP 1344.

Change-Id: I7c63316c8b04fb101d34064daac5ba4fdc05a63c
Signed-off-by: Bora Guvendik <bora.guvendik@intel.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/32992
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Subrata Banik <subrata.banik@intel.com>
This commit is contained in:
Bora Guvendik 2019-05-24 14:14:53 -07:00 • committed by Subrata Banik
commit c42ef561a0
1 changed files with 3 additions and 0 deletions
Download patch file Download diff file Expand all files Collapse all files

3
src/soc/intel/cannonlake/fsp_params.c
View file

@ -349,6 +349,9 @@ void platform_fsp_silicon_init_params_cb(FSPS_UPD *supd)
params->ScsUfsEnabled = dev->enabled;
params->Heci3Enabled = config->Heci3Enabled;
#if !CONFIG(HECI_DISABLE_USING_SMM)
params->Heci1Disabled = !config->HeciEnabled;
#endif
params->Device4Enable = config->Device4Enable;
/* VrConfig Settings for 5 domains