mb/google/fatcat/var/fatcat: Update THC Interrupt for Touchpad Development

This patch updates the TCH_PAD_INT_N GPP from A13 to F18

The Touch Pad's interrupt line (TCH_PAD_INT_N) was previously connected
to GPP_A13, This patch moves the interrupt line to GPP_F18, aligning it
with the THC1-i2c interface.

Both LPSS-i2c and THC1-i2c share SCL/SDA signals, with the exception of
the interrupt pin. This change ensures the interrupt pin shared between
both the interface.

The Tier-1 PMC GPE programming specifications limit us to configuring
three GPIO banks. Currently, GPP_A, GPP_D, and GPP_E are utilized, as
demonstrated in
[https://github.com/coreboot/coreboot/blob/main/src/mainboard/google/
fatcat/variants/baseboard/fatcat/devicetree.cb#L3]

We encounter a constraint when attempting to add GPP_F as an additional
Tier-1 GPIO due to the exhaustion of available PMC configuration
registers. However, the THC touchpad requires wake-capable registration,
necessitating a PMC GPE entry.

To resolve this, we have opted to configure GPP_F18 as an IOAPIC
interrupt. This solution provides a dedicated pin, avoiding the
complexities of GPIO shared IRQ masking. Furthermore, GPP_F18 supports
both interrupt (IRQ) and wake functionality, as defined by the ACPI
ACPI_IRQ_WAKE_LEVEL_LOW entry.

Snippet of change in runtime ASL code:
w/o cl:
`Name (_S0W, 0x03)  // _S0W: S0 Device Wake State
Name (_PRW, Package (0x02)  // _PRW: Power Resources for Wake
{
     0x0D,
     0x03
})`

w/ cl: no such entry

This patch also removed the GPP_F18 entry from the finger print sensor
config to avoid conflicts.

BUG=b:395160736
TEST=able to build google/fatcat. Verfied touchpad functionality

Change-Id: Ied917427225035a484a5873fa734f4c9f14277c0
Signed-off-by: Jayvik Desai <jayvik@google.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/86479
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Subrata Banik <subratabanik@google.com>
This commit is contained in:
Jayvik Desai 2025-02-10 23:58:34 +05:30 committed by Matt DeVillier
commit c41af2d43c
2 changed files with 9 additions and 11 deletions

View file

@ -431,10 +431,12 @@ static const struct pad_config touchscreen_thc_spi_enable_pads[] = {
};
static const struct pad_config touchpad_thc_i2c_enable_pads[] = {
/* GPP_F12: NF1: thc_i2c1_scl */
/* GPP_F12: NF1: THC_I2C1_SCL */
PAD_CFG_NF(GPP_F12, NONE, DEEP, NF1),
/* GPP_F13: NF1: thc_i2c1_sda */
/* GPP_F13: NF1: THC_I2C1_SDA */
PAD_CFG_NF(GPP_F13, NONE, DEEP, NF1),
/* GPP_F18: NF3: THC1_INT_N */
PAD_CFG_NF(GPP_F18, NONE, DEEP, NF3)
};
static const struct pad_config touchpad_lpss_i2c_enable_pads[] = {
@ -442,8 +444,8 @@ static const struct pad_config touchpad_lpss_i2c_enable_pads[] = {
PAD_CFG_NF(GPP_F12, NONE, DEEP, NF8),
/* GPP_F13: THC_I2C1_SDA_TCH_PAD */
PAD_CFG_NF(GPP_F13, NONE, DEEP, NF8),
/* GPP_A13: TCH_PAD_INT_N */
PAD_CFG_GPI_IRQ_WAKE(GPP_A13, NONE, PWROK, EDGE_SINGLE, INVERT),
/* GPP_F18: TCH_PAD_INT_N */
PAD_CFG_GPI_APIC(GPP_F18, NONE, PWROK, LEVEL, INVERT),
};
static const struct pad_config touchpad_i2c_disable_pads[] = {
@ -451,8 +453,8 @@ static const struct pad_config touchpad_i2c_disable_pads[] = {
PAD_NC(GPP_F12, NONE),
/* GPP_F13: THC_I2C1_SDA_TCH_PAD */
PAD_NC(GPP_F13, NONE),
/* GPP_A13: TCH_PAD_INT_N */
PAD_NC(GPP_A13, NONE),
/* GPP_F18: TCH_PAD_INT_N */
PAD_NC(GPP_F18, NONE),
};
static const struct pad_config ish_disable_pads[] = {
@ -488,7 +490,6 @@ static const struct pad_config fp_disable_pads[] = {
PAD_NC(GPP_F14, NONE),
PAD_NC(GPP_F15, NONE),
PAD_NC(GPP_F16, NONE),
PAD_NC(GPP_F18, NONE),
};
static const struct pad_config fp_enable_pads[] = {
@ -508,8 +509,6 @@ static const struct pad_config fp_enable_pads[] = {
PAD_CFG_NF(GPP_F15, NONE, DEEP, NF8),
/* GPP_F16: GPSI0A_CLK */
PAD_CFG_NF(GPP_F16, NONE, DEEP, NF8),
/* GPP_F18: NC */
PAD_NC(GPP_F18, NONE),
};
static const struct pad_config pre_mem_fp_enable_pads[] = {

View file

@ -821,8 +821,7 @@ chip soc/intel/pantherlake
chip drivers/i2c/hid
register "generic.hid" = ""HFW68H""
register "generic.desc" = ""Hynitron TOUCHPAD""
register "generic.irq" = "ACPI_IRQ_WAKE_LEVEL_LOW(GPP_A13_IRQ)"
register "generic.wake" = "GPE0_DW0_13"
register "generic.irq" = "ACPI_IRQ_WAKE_LEVEL_LOW(GPP_F18_IRQ)"
register "generic.uid" = "5"
register "generic.detect" = "1"
register "hid_desc_reg_offset" = "0x20"