mb/lattepanda/mu: Add flashmap definition

Add `board.fmd` and update Kconfig to define FMDFILE for
LattePanda MU.

This file describes the flash layout including
- Flash Descriptor
- ME
- MRC_CACHE
- SMMSTORE
- CBFS

TEST=Built mb/lattepanda/mu with and without board.fmd.

Adjusting FMAP layout via board.fmd changes section sizes and offsets.
This affects the position and size of the COREBOOT (CBFS) region in
the final ROM image.

With board.fmd:
  - FMAP layout explicitly defines COREBOOT size and offset
  - build log shows detailed FMAP section breakdown, including
    CBFS region

Sample log excerpt:
  'COREBOOT' (CBFS, size 3865600, offset 12911616)

Without board.fmd:
  - default FMAP layout is applied
  - COREBOOT region is located differently

with board.fmd

```
Writing new image to build/coreboot.pre
    UPDATE-FIT set FIT pointer to table
    UPDATE-FIT Microcode
    CBFS       coreboot.rom

    FIT table:
    Index  Type                 Addr             Size
         0 Microcode            0xffc504b0      0x00000000

    CBFSLAYOUT  coreboot.rom

This image contains the following sections that can be manipulated
with this tool:

'SI_DESC' (size 4096, offset 0)
'SI_ME' (size 4272128, offset 4096)
'SI_PDR' (size 2015232, offset 4276224)
'RW_MRC_CACHE' (size 65536, offset 12582912)
'SMMSTORE' (size 262144, offset 12648448)
'COREBOOT' (CBFS, size 3865600, offset 12911616)

...

Built lattepanda/mu (MU_8G)
```

without 'board.fmd'

```
Writing new image to build/coreboot.pre
    UPDATE-FIT set FIT pointer to table
    UPDATE-FIT Microcode
    CBFS       coreboot.rom

    FIT table:
    Index  Type                 Addr             Size
         0 Microcode            0xffc502b0      0x00000000

    CBFSLAYOUT  coreboot.rom

This image contains the following sections that can be manipulated
with this tool:

'SI_DESC' (size 4096, offset 0)
'SI_ME' (size 4272128, offset 4096)
'SI_DEVICEEXT2' (size 2015232, offset 4276224)
'RW_MRC_CACHE' (size 65536, offset 12582912)
'SMMSTORE' (size 262144, offset 12648448)
'COREBOOT' (CBFS, size 3866112, offset 12911104)

...

Built lattepanda/mu (MU_8G)
```

Change-Id: If197679c8359f5f75ab125b0c8600926611ac57b
Signed-off-by: Kun-Yi Chen <kunyi.chen@gmail.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/88192
Reviewed-by: Matt DeVillier <matt.devillier@gmail.com>
Reviewed-by: Paul Menzel <paulepanter@mailbox.org>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>

src/mainboard/lattepanda/mu/Kconfig

@@ -18,6 +18,9 @@ config BOARD_SPECIFIC_OPTIONS
 	select SOC_INTEL_ALDERLAKE_PCH_N
 	select SUPERIO_ITE_IT8613E
 
+config FMDFILE
+	default "src/mainboard/\$(CONFIG_MAINBOARD_DIR)/board.fmd"
+
 config MAINBOARD_DIR
 	default "lattepanda/mu"
 

src/mainboard/lattepanda/mu/board.fmd

@@ -0,0 +1,22 @@
+# layout for firmware residing at top of 4GB address space
+# +-------------+ <-- 4GB - ROM_SIZE / start of flash
+# | unspecified |
+# +-------------+ <-- 4GB - BIOS_SIZE
+# | FMAP        |
+# +-------------+ <-- 4GB - BIOS_SIZE + FMAP_SIZE
+# | CBFS        |
+# +-------------+ <-- 4GB / end of flash
+
+FLASH 16M {
+	SI_ALL	6M {
+		SI_DESC		4K
+		SI_ME		4172K
+		SI_PDR		1968K
+	}
+	SI_BIOS@12M 4M {
+		RW_MRC_CACHE	64K
+		SMMSTORE 	256K
+		FMAP		1K
+		COREBOOT(CBFS)
+	}
+}