From c37de66082bc15dc734bd400e4aa9806081fffc2 Mon Sep 17 00:00:00 2001 From: "Ronald G. Minnich" Date: Fri, 15 Aug 2008 23:37:29 +0000 Subject: [PATCH] Small typos. Signed-off-by: Ronald G. Minnich Acked-by: Ronald G. Minnich git-svn-id: svn://coreboot.org/repository/coreboot-v3@774 f3766cd6-281f-0410-b1cd-43a5c92072e9 --- southbridge/amd/amd8111/amd8111_smbus.h | 1 + southbridge/amd/amd8111/stage1_smbus.c | 7 +++---- 2 files changed, 4 insertions(+), 4 deletions(-) diff --git a/southbridge/amd/amd8111/amd8111_smbus.h b/southbridge/amd/amd8111/amd8111_smbus.h index 34710a8245..1a9187156f 100644 --- a/southbridge/amd/amd8111/amd8111_smbus.h +++ b/southbridge/amd/amd8111/amd8111_smbus.h @@ -1,4 +1,5 @@ #include +#include #define SMBGSTATUS 0xe0 #define SMBGCTL 0xe2 diff --git a/southbridge/amd/amd8111/stage1_smbus.c b/southbridge/amd/amd8111/stage1_smbus.c index 79c7f34f2e..0e1e9f92cc 100644 --- a/southbridge/amd/amd8111/stage1_smbus.c +++ b/southbridge/amd/amd8111/stage1_smbus.c @@ -37,12 +37,11 @@ void enable_smbus(void) { - u32 bdf; + u32 dev; u8 enable; - /* this 746b is the ACPI device. This is from original code. It's weird however. */ - pci_locate_device_on_bus(0, PCI_VENDOR_ID_AMD, 0x746b, &dev); - if (dev == PCI_DEV_INVALID) { + /* Yes, the ACPI device controls the SMBUS. */ + if (!pci_conf1_find_on_bus(0, PCI_VENDOR_ID_AMD, PCI_DEVICE_ID_AMD_8111_ACPI, &dev)){ die("SMBUS controller not found\r\n"); }