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util/inteltool: Add support for Arrow Lake H

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Add PCI IDs necessary to support Intel Core Ultra 9 285H (Arrow Lake-H
platform). Arrow Lake is a Meteor Lake variant, so handle the same as
Meteor Lake-P. Add a missing PCI ID for MTL-P as well.

TEST=dump GPIOs on Starlabs Starfighter with Core Ultra 125H (MTL) and
285H (ARL) CPUs.

Change-Id: I14b74227ce808a7b4269741b7e2c5f23326bced4
Signed-off-by: Matt DeVillier <matt.devillier@gmail.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/90868
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Sean Rhodes <sean@starlabs.systems>
This commit is contained in:
Matt DeVillier 2026-01-22 14:02:49 -06:00
commit c377682973
5 changed files with 17 additions and 0 deletions
Download patch file Download diff file Expand all files Collapse all files

2
util/inteltool/gpio.c
View file

@ -1133,6 +1133,7 @@ int print_gpios(struct pci_dev *sb, int show_all, int show_diffs)
case PCI_DEVICE_ID_INTEL_CORE_MTL_ID_P_3:
case PCI_DEVICE_ID_INTEL_CORE_MTL_ID_P_4:
case PCI_DEVICE_ID_INTEL_CORE_MTL_ID_P_5:
case PCI_DEVICE_ID_INTEL_CORE_ARL_ID_H_1:
case PCI_DEVICE_ID_INTEL_MTL_0:
case PCI_DEVICE_ID_INTEL_MTL_1:
case PCI_DEVICE_ID_INTEL_MTL_2:
@ -1141,6 +1142,7 @@ int print_gpios(struct pci_dev *sb, int show_all, int show_diffs)
case PCI_DEVICE_ID_INTEL_MTL_5:
case PCI_DEVICE_ID_INTEL_MTL_6:
case PCI_DEVICE_ID_INTEL_MTL_7:
case PCI_DEVICE_ID_INTEL_ARL_1:
print_gpio_groups(sb);
return 0;
case PCI_DEVICE_ID_INTEL_82371XX:

1
util/inteltool/gpio_groups.c
View file

@ -264,6 +264,7 @@ const struct gpio_community *const *get_gpio_communities(struct pci_dev *const s
case PCI_DEVICE_ID_INTEL_MTL_5:
case PCI_DEVICE_ID_INTEL_MTL_6:
case PCI_DEVICE_ID_INTEL_MTL_7:
case PCI_DEVICE_ID_INTEL_ARL_1:
*community_count = ARRAY_SIZE(meteorlake_pch_communities);
*pad_stepping = 16;
return meteorlake_pch_communities;

6
util/inteltool/inteltool.c
View file

@ -204,6 +204,8 @@ static const struct {
"14th generation (Meteor Lake P family) Core Processor"},
{ PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_CORE_MTL_ID_P_5,
"14th generation (Meteor Lake P family) Core Processor"},
{ PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_CORE_ARL_ID_H_1,
"14th generation (Arrow Lake H family) Core Processor"},
{ PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_ELKHART_LAKE_1,
"Elkhart Lake Processor" },
@ -465,6 +467,8 @@ static const struct {
{ PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_JSL, "Jasper Lake" },
{ PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_ADL_N, "Alder Lake-N"},
{ PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_RPL_P, "Raptor Lake" },
{ PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_MTL_P, "Meteor Lake-P"},
{ PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_ARL_H, "Arrow Lake-H"},
/* Intel GPUs */
{ PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_G35_EXPRESS,
@ -643,6 +647,8 @@ static const struct {
"Intel(R) MeteorLake-P GT2" },
{ PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_MTL_P_GT2_4,
"Intel(R) MeteorLake-P GT2" },
{ PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_ARL_H_GT2_1,
"Intel(R) ArrowLake-H GT2" },
{ PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_EHL_GT1_1,
"Intel(R) Elkhart Lake GT1" },
{ PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_EHL_GT1_2,

7
util/inteltool/inteltool.h
View file

@ -258,6 +258,8 @@ static inline uint32_t inl(unsigned port)
#define PCI_DEVICE_ID_INTEL_MTL_6 0x7e06
#define PCI_DEVICE_ID_INTEL_MTL_7 0x7e07
#define PCI_DEVICE_ID_INTEL_ARL_1 0x7702
#define PCI_DEVICE_ID_INTEL_82810 0x7120
#define PCI_DEVICE_ID_INTEL_82810_DC 0x7122
#define PCI_DEVICE_ID_INTEL_82810E_DC 0x7124
@ -321,6 +323,9 @@ static inline uint32_t inl(unsigned port)
#define PCI_DEVICE_ID_INTEL_RPL_P 0x519d
#define PCI_DEVICE_ID_INTEL_ADL_N 0x5481
#define PCI_DEVICE_ID_INTEL_MTL_P 0x7e27
#define PCI_DEVICE_ID_INTEL_ARL_H 0x7727
#define PCI_DEVICE_ID_INTEL_EHL 0x4b00
#define PCI_DEVICE_ID_INTEL_JSL 0x4d87
@ -420,6 +425,7 @@ static inline uint32_t inl(unsigned port)
#define PCI_DEVICE_ID_INTEL_CORE_MTL_ID_M 0x7D00 /* Meteorlake M */
#define PCI_DEVICE_ID_INTEL_CORE_MTL_ID_P_1 0x7D01 /* Meteorlake P */
#define PCI_DEVICE_ID_INTEL_CORE_MTL_ID_P_2 0x7D02 /* Meteorlake P */
#define PCI_DEVICE_ID_INTEL_CORE_ARL_ID_H_1 0x7D06 /* Arrowlake H */
#define PCI_DEVICE_ID_INTEL_CORE_MTL_ID_P_3 0x7d14 /* Meteorlake P */
#define PCI_DEVICE_ID_INTEL_CORE_MTL_ID_P_4 0x7d15 /* Meteorlake P */
#define PCI_DEVICE_ID_INTEL_CORE_MTL_ID_P_5 0x7d16 /* Meteorlake P */
@ -521,6 +527,7 @@ static inline uint32_t inl(unsigned port)
#define PCI_DEVICE_ID_INTEL_MTL_P_GT2_2 0x7d50
#define PCI_DEVICE_ID_INTEL_MTL_P_GT2_3 0x7d55
#define PCI_DEVICE_ID_INTEL_MTL_P_GT2_4 0x7d60
#define PCI_DEVICE_ID_INTEL_ARL_H_GT2_1 0x7d51
#define PCI_DEVICE_ID_INTEL_RPL_H_IRIS_XE 0xa7a0
#if !defined(__DARWIN__) && !defined(__FreeBSD__)

1
util/inteltool/pcr.c
View file

@ -188,6 +188,7 @@ void pcr_init(struct pci_dev *const sb)
case PCI_DEVICE_ID_INTEL_MTL_5:
case PCI_DEVICE_ID_INTEL_MTL_6:
case PCI_DEVICE_ID_INTEL_MTL_7:
case PCI_DEVICE_ID_INTEL_ARL_1:
sbbar_phys = 0xe0000000;
use_p2sb = false;
break;