diff --git a/src/mainboard/google/ocelot/variants/baseboard/ocelot/devicetree.cb b/src/mainboard/google/ocelot/variants/baseboard/ocelot/devicetree.cb
index 3c8ab4f7b1..2939a065fa 100644
--- a/src/mainboard/google/ocelot/variants/baseboard/ocelot/devicetree.cb
+++ b/src/mainboard/google/ocelot/variants/baseboard/ocelot/devicetree.cb
@@ -63,9 +63,6 @@ chip soc/intel/pantherlake
 	# Enable Energy Reporting
 	register "pch_pm_energy_report_enable" = "true"
 
-	# Enable CNVi BT
-	register "cnvi_bt_core" = "true"
-
 	register "serial_io_uart_mode" = "{
 		[PchSerialIoIndexUART0] = PchSerialIoSkipInit,
 		[PchSerialIoIndexUART1] = PchSerialIoDisabled,