tree: Use true, false for PcieRpClkReqSupport

PcieRpClkReqSupport[] is a boolean, so use true/false.

Change-Id: I541ac5361dc0a929459edef7bb1f49c57b137c14
Signed-off-by: Elyes Haouas <ehaouas@noos.fr>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/86281
Reviewed-by: Felix Singer <service+coreboot-gerrit@felixsinger.de>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>

src/mainboard/51nb/x210/devicetree.cb

@@ -89,7 +89,7 @@ chip soc/intel/skylake
 		end
 		device ref pcie_rp3	on
 			# Ethernet controller
-			register "PcieRpClkReqSupport[2]" = "1"
+			register "PcieRpClkReqSupport[2]" = "true"
 			register "PcieRpClkReqNumber[2]" = "0"
 			register "PcieRpClkSrcNumber[2]" = "0"
 			register "PcieRpAdvancedErrorReporting[2]" = "1"
@@ -97,7 +97,7 @@ chip soc/intel/skylake
 		end
 		device ref pcie_rp4	on
 			# Wireless controller
-			register "PcieRpClkReqSupport[3]" = "1"
+			register "PcieRpClkReqSupport[3]" = "true"
 			register "PcieRpClkReqNumber[3]" = "1"
 			register "PcieRpClkSrcNumber[3]" = "1"
 			register "PcieRpAdvancedErrorReporting[3]" = "1"
@@ -105,7 +105,7 @@ chip soc/intel/skylake
 		end
 		device ref pcie_rp9	on
 			# NVMe controller
-			register "PcieRpClkReqSupport[8]" = "1"
+			register "PcieRpClkReqSupport[8]" = "true"
 			register "PcieRpClkReqNumber[8]" = "4"
 			register "PcieRpClkSrcNumber[8]" = "4"
 			register "PcieRpAdvancedErrorReporting[8]" = "1"

src/mainboard/acer/aspire_vn7_572g/devicetree.cb

@@ -253,7 +253,7 @@ chip soc/intel/skylake
 			# dGPU; x4
 			register "PcieRpAdvancedErrorReporting[0]" = "1"
 			register "PcieRpLtrEnable[0]" = "true"
-			register "PcieRpClkReqSupport[0]" = "1"
+			register "PcieRpClkReqSupport[0]" = "true"
 			register "PcieRpClkReqNumber[0]" = "0"
 			register "PcieRpMaxPayload[0]" = "RpMaxPayload_256"
 		end
@@ -261,7 +261,7 @@ chip soc/intel/skylake
 			# NGFF; x2
 			register "PcieRpAdvancedErrorReporting[6]" = "1"
 			register "PcieRpLtrEnable[6]" = "true"
-			register "PcieRpClkReqSupport[6]" = "1"
+			register "PcieRpClkReqSupport[6]" = "true"
 			register "PcieRpClkReqNumber[6]" = "3"
 			register "PcieRpMaxPayload[6]" = "RpMaxPayload_256"
 		end
@@ -269,7 +269,7 @@ chip soc/intel/skylake
 			# LAN
 			register "PcieRpAdvancedErrorReporting[8]" = "1"
 			register "PcieRpLtrEnable[8]" = "true"
-			register "PcieRpClkReqSupport[8]" = "1"
+			register "PcieRpClkReqSupport[8]" = "true"
 			register "PcieRpClkReqNumber[8]" = "1"
 			register "PcieRpMaxPayload[8]" = "RpMaxPayload_256"
 		end
@@ -277,7 +277,7 @@ chip soc/intel/skylake
 			# WLAN
 			register "PcieRpAdvancedErrorReporting[9]" = "1"
 			register "PcieRpLtrEnable[9]" = "true"
-			register "PcieRpClkReqSupport[9]" = "1"
+			register "PcieRpClkReqSupport[9]" = "true"
 			register "PcieRpClkReqNumber[9]" = "2"
 			register "PcieRpMaxPayload[9]" = "RpMaxPayload_256"
 			# ASPM L0s is broken/unsupported on Qualcomm Atheros QCA6174 (AER: corrected errors)

src/mainboard/asrock/h110m/devicetree.cb

@@ -50,7 +50,7 @@ chip soc/intel/skylake
 			register "Peg0MaxLinkWidth" = "Peg0_x16"
 
 			# Configure PCIe clockgen in PCH
-			register "PcieRpClkReqSupport[0]"	= "1"
+			register "PcieRpClkReqSupport[0]"	= "true"
 			register "PcieRpClkReqNumber[0]"	= "0"
 			register "PcieRpClkSrcNumber[0]"	= "0"
 		end
@@ -113,7 +113,7 @@ chip soc/intel/skylake
 		end
 		device ref pcie_rp1	on	end
 		device ref pcie_rp5	on
-			register "PcieRpClkReqSupport[4]"		= "1"
+			register "PcieRpClkReqSupport[4]"		= "true"
 			register "PcieRpClkReqNumber[4]"		= "2"
 			register "PcieRpAdvancedErrorReporting[4]"	= "1"
 			register "PcieRpLtrEnable[4]"			= "true"
@@ -123,13 +123,13 @@ chip soc/intel/skylake
 		device ref pcie_rp6	on
 
 			# Disable CLKREQ#, since onboard LAN is always present
-			register "PcieRpClkReqSupport[5]"		= "0"
+			register "PcieRpClkReqSupport[5]"		= "false"
 			register "PcieRpAdvancedErrorReporting[5]"	= "1"
 			register "PcieRpLtrEnable[5]"			= "true"
 			register "PcieRpClkSrcNumber[5]"		= "1"
 		end
 		device ref pcie_rp7	on
-			register "PcieRpClkReqSupport[6]"		= "1"
+			register "PcieRpClkReqSupport[6]"		= "true"
 			register "PcieRpClkReqNumber[6]"		= "3"
 			register "PcieRpAdvancedErrorReporting[6]"	= "1"
 			register "PcieRpLtrEnable[6]"			= "true"

src/mainboard/clevo/kbl-u/variants/n13xwu/devicetree.cb

@@ -66,7 +66,7 @@ chip soc/intel/skylake
 		device ref uart2	on	end
 		device ref pcie_rp1	on
 			device pci 00.0 on end # x4 TBT
-			register "PcieRpClkReqSupport[0]" = "1"
+			register "PcieRpClkReqSupport[0]" = "true"
 			register "PcieRpClkReqNumber[0]" = "4"
 			register "PcieRpClkSrcNumber[0]" = "4"
 			register "PcieRpHotPlug[0]" = "1"
@@ -75,14 +75,14 @@ chip soc/intel/skylake
 		end
 		device ref pcie_rp5	on
 			device pci 00.0 on end # x1 LAN
-			register "PcieRpClkReqSupport[4]" = "1"
+			register "PcieRpClkReqSupport[4]" = "true"
 			register "PcieRpClkReqNumber[4]" = "3"
 			register "PcieRpClkSrcNumber[4]" = "3"
 			register "PcieRpLtrEnable[4]" = "true"
 		end
 		device ref pcie_rp6	on
 			device pci 00.0 on end # x1 WLAN
-			register "PcieRpClkReqSupport[5]" = "1"
+			register "PcieRpClkReqSupport[5]" = "true"
 			register "PcieRpClkReqNumber[5]" = "2"
 			register "PcieRpClkSrcNumber[5]" = "2"
 			register "PcieRpLtrEnable[5]" = "true"
@@ -90,7 +90,7 @@ chip soc/intel/skylake
 		end
 		device ref pcie_rp9	on
 			device pci 00.0 on end # x4 M.2/M (J_SSD1)
-			register "PcieRpClkReqSupport[8]" = "1"
+			register "PcieRpClkReqSupport[8]" = "true"
 			register "PcieRpClkReqNumber[8]" = "5"
 			register "PcieRpClkSrcNumber[8]" = "5"
 			register "PcieRpLtrEnable[8]" = "true"

src/mainboard/dell/optiplex_3050/devicetree.cb

@@ -39,7 +39,7 @@ chip soc/intel/skylake
 
 		# M.2 SSD
 		device ref pcie_rp21 on
-			register "PcieRpClkReqSupport[20]"              = "1"
+			register "PcieRpClkReqSupport[20]"              = "true"
 			register "PcieRpClkReqNumber[20]"               = "3"
 			register "PcieRpAdvancedErrorReporting[20]"     = "1"
 			register "PcieRpLtrEnable[20]"                  = "true"
@@ -49,13 +49,13 @@ chip soc/intel/skylake
 
 		# Realtek LAN
 		device ref pcie_rp5 on
-			register "PcieRpClkReqSupport[4]"		= "0"
+			register "PcieRpClkReqSupport[4]"		= "false"
 			register "PcieRpHotPlug[4]"			= "0"
 		end
 
 		# M.2 WiFi
 		device ref pcie_rp8 on
-			register "PcieRpClkReqSupport[7]"		= "0"
+			register "PcieRpClkReqSupport[7]"		= "false"
 			register "PcieRpHotPlug[7]"			= "1"
 		end
 

src/mainboard/facebook/monolith/devicetree.cb

@@ -157,7 +157,7 @@ chip soc/intel/skylake
 		device ref pcie_rp3	on
 			# x1 baseboard WWAN
 			# PCIE Port 3 x1 -> Module x1 : Mapped to PCIe 2 on the baseboard
-			register "PcieRpClkReqSupport[2]" = "0"
+			register "PcieRpClkReqSupport[2]" = "false"
 			register "PcieRpMaxPayload[2]" = "RpMaxPayload_256"
 			register "PcieRpLtrEnable[2]" = "true"
 			register "PcieRpAdvancedErrorReporting[2]" = "1"
@@ -166,7 +166,7 @@ chip soc/intel/skylake
 		device ref pcie_rp6	on
 			# x1 baseboard i210
 			# PCIE Port 6 x1 -> BASEBOARD x1 i210 : Mapped to PCIe 4 on the baseboard
-			register "PcieRpClkReqSupport[5]" = "0"
+			register "PcieRpClkReqSupport[5]" = "false"
 			register "PcieRpMaxPayload[5]" = "RpMaxPayload_256"
 			register "PcieRpLtrEnable[5]" = "true"
 			register "PcieRpAdvancedErrorReporting[5]" = "1"
@@ -175,7 +175,7 @@ chip soc/intel/skylake
 		device ref pcie_rp9	on
 			# x4 FPGA
 			# PCIE Port 9 x4 -> BASEBOARD PEG0-3 FPGA
-			register "PcieRpClkReqSupport[8]" = "0"
+			register "PcieRpClkReqSupport[8]" = "false"
 			register "PcieRpHotPlug[8]" = "1"
 			register "PcieRpMaxPayload[8]" = "RpMaxPayload_256"
 			register "PcieRpLtrEnable[8]" = "true"

src/mainboard/google/eve/devicetree.cb

@@ -336,7 +336,7 @@ chip soc/intel/skylake
 			end
 		end # I2C #4
 		device ref pcie_rp1	on
-			register "PcieRpClkReqSupport[0]" = "1"
+			register "PcieRpClkReqSupport[0]" = "true"
 			register "PcieRpClkReqNumber[0]" = "1"
 			register "PcieRpAdvancedErrorReporting[0]" = "1"
 			register "PcieRpLtrEnable[0]" = "true"
@@ -348,7 +348,7 @@ chip soc/intel/skylake
 			end
 		end
 		device ref pcie_rp5	on
-			register "PcieRpClkReqSupport[4]" = "1"
+			register "PcieRpClkReqSupport[4]" = "true"
 			register "PcieRpClkReqNumber[4]" = "4"
 			register "PcieRpAdvancedErrorReporting[4]" = "1"
 			register "PcieRpLtrEnable[4]" = "true"

src/mainboard/google/fizz/variants/baseboard/devicetree.cb

@@ -289,7 +289,7 @@ chip soc/intel/skylake
 		device ref pcie_rp3	on
 			# LAN, will be swapped to port 1 by FSP
 			# x1
-			register "PcieRpClkReqSupport[2]" = "1"
+			register "PcieRpClkReqSupport[2]" = "true"
 			register "PcieRpClkReqNumber[2]" = "0"
 			register "PcieRpAdvancedErrorReporting[2]" = "1"
 			register "PcieRpLtrEnable[2]" = "true"
@@ -303,7 +303,7 @@ chip soc/intel/skylake
 		end
 		device ref pcie_rp4	on
 			# x1 WLAN
-			register "PcieRpClkReqSupport[3]" = "1"
+			register "PcieRpClkReqSupport[3]" = "true"
 			register "PcieRpClkReqNumber[3]" = "5"
 			register "PcieRpAdvancedErrorReporting[3]" = "1"
 			register "PcieRpLtrEnable[3]" = "true"
@@ -315,7 +315,7 @@ chip soc/intel/skylake
 		end
 		device ref pcie_rp5	on
 			# x4 NVMe
-			register "PcieRpClkReqSupport[4]" = "1"
+			register "PcieRpClkReqSupport[4]" = "true"
 			register "PcieRpClkReqNumber[4]" = "1"
 			register "PcieRpAdvancedErrorReporting[4]" = "1"
 			register "PcieRpLtrEnable[4]" = "true"
@@ -323,7 +323,7 @@ chip soc/intel/skylake
 		end
 		device ref pcie_rp9	on
 			# 2nd LAN
-			register "PcieRpClkReqSupport[8]" = "1"
+			register "PcieRpClkReqSupport[8]" = "true"
 			register "PcieRpClkReqNumber[8]" = "2"
 			register "PcieRpAdvancedErrorReporting[8]" = "1"
 			register "PcieRpLtrEnable[8]" = "true"
@@ -335,14 +335,14 @@ chip soc/intel/skylake
 			end
 		end
 		device ref pcie_rp11	on
-			register "PcieRpClkReqSupport[10]" = "1"
+			register "PcieRpClkReqSupport[10]" = "true"
 			register "PcieRpClkReqNumber[10]" = "2"
 			register "PcieRpAdvancedErrorReporting[10]" = "1"
 			register "PcieRpLtrEnable[10]" = "true"
 			register "PcieRpClkSrcNumber[10]" = "2"
 		end
 		device ref pcie_rp12	on
-			register "PcieRpClkReqSupport[11]" = "1"
+			register "PcieRpClkReqSupport[11]" = "true"
 			register "PcieRpClkReqNumber[11]" = "2"
 			register "PcieRpAdvancedErrorReporting[11]" = "1"
 			register "PcieRpLtrEnable[11]" = "true"

src/mainboard/google/fizz/variants/endeavour/overridetree.cb

@@ -116,7 +116,7 @@ chip soc/intel/skylake
 		end
 		device ref pcie_rp7 on
 			# x1 TPU1
-			register "PcieRpClkReqSupport[6]" = "1"
+			register "PcieRpClkReqSupport[6]" = "true"
 			register "PcieRpClkReqNumber[6]" = "4"
 			register "PcieRpAdvancedErrorReporting[6]" = "1"
 			register "PcieRpLtrEnable[6]" = "true"
@@ -124,7 +124,7 @@ chip soc/intel/skylake
 		end
 		device ref pcie_rp8 on
 			# x1 TPU0
-			register "PcieRpClkReqSupport[7]" = "1"
+			register "PcieRpClkReqSupport[7]" = "true"
 			register "PcieRpClkReqNumber[7]" = "2"
 			register "PcieRpAdvancedErrorReporting[7]" = "1"
 			register "PcieRpLtrEnable[7]" = "true"
@@ -132,7 +132,7 @@ chip soc/intel/skylake
 		end
 		device ref pcie_rp9 on
 			# x4 i350 LAN
-			register "PcieRpClkReqSupport[8]" = "0"
+			register "PcieRpClkReqSupport[8]" = "false"
 			register "PcieRpAdvancedErrorReporting[8]" = "1"
 			register "PcieRpLtrEnable[8]" = "true"
 			register "PcieRpClkSrcNumber[8]" = "2"

src/mainboard/google/glados/devicetree.cb

@@ -78,7 +78,7 @@ chip soc/intel/skylake
 		device ref uart2	on  end
 		device ref i2c4		on  end
 		device ref pcie_rp1	on
-			register "PcieRpClkReqSupport[0]" = "1"
+			register "PcieRpClkReqSupport[0]" = "true"
 			register "PcieRpClkReqNumber[0]" = "1"
 			chip drivers/wifi/generic
 				register "wake" = "GPE0_DW0_16"

src/mainboard/google/poppy/variants/atlas/devicetree.cb

@@ -310,7 +310,7 @@ chip soc/intel/skylake
 		end
 		device ref pcie_rp1		on
 			# WLAN
-			register "PcieRpClkReqSupport[0]" = "1"
+			register "PcieRpClkReqSupport[0]" = "true"
 			register "PcieRpClkReqNumber[0]" = "1"
 			register "PcieRpClkSrcNumber[0]" = "1"
 			register "PcieRpAdvancedErrorReporting[0]" = "1"

src/mainboard/google/poppy/variants/baseboard/devicetree.cb

@@ -323,7 +323,7 @@ chip soc/intel/skylake
 		end
 		device ref i2c4			on end
 		device ref pcie_rp1		on
-			register "PcieRpClkReqSupport[0]" = "1"
+			register "PcieRpClkReqSupport[0]" = "true"
 			register "PcieRpClkReqNumber[0]" = "1"
 			register "PcieRpAdvancedErrorReporting[0]" = "1"
 			register "PcieRpLtrEnable[0]" = "true"

src/mainboard/google/poppy/variants/nami/devicetree.cb

@@ -366,7 +366,7 @@ chip soc/intel/skylake
 		device ref pcie_rp1		on  end
 		device ref pcie_rp4		on
 			# x1
-			register "PcieRpClkReqSupport[3]" = "1"
+			register "PcieRpClkReqSupport[3]" = "true"
 			register "PcieRpClkReqNumber[3]" = "1"
 			register "PcieRpClkSrcNumber[3]" = "1"
 			register "PcieRpAdvancedErrorReporting[3]" = "1"
@@ -378,7 +378,7 @@ chip soc/intel/skylake
 		end
 		device ref pcie_rp5		on
 			# x4
-			register "PcieRpClkReqSupport[4]" = "1"
+			register "PcieRpClkReqSupport[4]" = "true"
 			register "PcieRpClkReqNumber[4]" = "3"
 			register "PcieRpClkSrcNumber[4]" = "3"
 			register "PcieRpAdvancedErrorReporting[4]" = "1"
@@ -386,7 +386,7 @@ chip soc/intel/skylake
 		end
 		device ref pcie_rp9		on
 			# x2
-			register "PcieRpClkReqSupport[8]" = "1"
+			register "PcieRpClkReqSupport[8]" = "true"
 			register "PcieRpClkReqNumber[8]" = "2"
 			register "PcieRpClkSrcNumber[8]" = "2"
 			register "PcieRpAdvancedErrorReporting[8]" = "1"

src/mainboard/google/poppy/variants/nautilus/devicetree.cb

@@ -361,7 +361,7 @@ chip soc/intel/skylake
 			end
 		end
 		device ref pcie_rp1		on
-			register "PcieRpClkReqSupport[0]" = "1"
+			register "PcieRpClkReqSupport[0]" = "true"
 			register "PcieRpClkReqNumber[0]" = "1"
 			register "PcieRpClkSrcNumber[0]" = "1"
 			register "PcieRpAdvancedErrorReporting[0]" = "1"

src/mainboard/google/poppy/variants/nocturne/devicetree.cb

@@ -325,7 +325,7 @@ chip soc/intel/skylake
 			end
 		end
 		device ref pcie_rp1		on
-			register "PcieRpClkReqSupport[0]" = "1"
+			register "PcieRpClkReqSupport[0]" = "true"
 			register "PcieRpClkReqNumber[0]" = "1"
 			register "PcieRpClkSrcNumber[0]" = "1"
 			register "PcieRpAdvancedErrorReporting[0]" = "1"
@@ -337,7 +337,7 @@ chip soc/intel/skylake
 		end
 		device ref pcie_rp9		on
 			# x2
-			register "PcieRpClkReqSupport[8]" = "1"
+			register "PcieRpClkReqSupport[8]" = "true"
 			register "PcieRpClkReqNumber[8]" = "2"
 			register "PcieRpClkSrcNumber[8]" = "3"
 			register "PcieRpAdvancedErrorReporting[8]" = "1"

src/mainboard/google/poppy/variants/rammus/devicetree.cb

@@ -314,7 +314,7 @@ chip soc/intel/skylake
 			end
 		end
 		device ref pcie_rp1		on
-			register "PcieRpClkReqSupport[0]" = "1"
+			register "PcieRpClkReqSupport[0]" = "true"
 			register "PcieRpClkReqNumber[0]" = "1"
 			register "PcieRpClkSrcNumber[0]" = "1"
 			register "PcieRpAdvancedErrorReporting[0]" = "1"

src/mainboard/google/poppy/variants/soraka/devicetree.cb

@@ -305,7 +305,7 @@ chip soc/intel/skylake
 		end
 		device ref i2c4			on  end
 		device ref pcie_rp1		on
-			register "PcieRpClkReqSupport[0]" = "1"
+			register "PcieRpClkReqSupport[0]" = "true"
 			register "PcieRpClkReqNumber[0]" = "1"
 			register "PcieRpAdvancedErrorReporting[0]" = "1"
 			register "PcieRpLtrEnable[0]" = "true"

src/mainboard/intel/kblrvp/variants/rvp11/overridetree.cb

@@ -75,32 +75,32 @@ chip soc/intel/skylake
 		end
 		device ref i2c4		off end
 		device ref pcie_rp6	on
-			register "PcieRpClkReqSupport[5]" = "1"
+			register "PcieRpClkReqSupport[5]" = "true"
 			register "PcieRpClkReqNumber[5]" = "1"
 			register "PcieRpClkSrcNumber[5]" = "1"
 		end
 		device ref pcie_rp7	on
-			register "PcieRpClkReqSupport[6]" = "1"
+			register "PcieRpClkReqSupport[6]" = "true"
 			register "PcieRpClkReqNumber[6]" = "2"
 			register "PcieRpClkSrcNumber[6]" = "2"
 		end
 		device ref pcie_rp8	on
-			register "PcieRpClkReqSupport[7]" = "1"
+			register "PcieRpClkReqSupport[7]" = "true"
 			register "PcieRpClkReqNumber[7]" = "3"
 			register "PcieRpClkSrcNumber[7]" = "3"
 		end
 		device ref pcie_rp9	on
-			register "PcieRpClkReqSupport[8]" = "1"
+			register "PcieRpClkReqSupport[8]" = "true"
 			register "PcieRpClkReqNumber[8]" = "4"
 			register "PcieRpClkSrcNumber[8]" = "4"
 		end
 		device ref pcie_rp14	on
-			register "PcieRpClkReqSupport[13]" = "1"
+			register "PcieRpClkReqSupport[13]" = "true"
 			register "PcieRpClkReqNumber[13]" = "5"
 			register "PcieRpClkSrcNumber[13]" = "5"
 		end
 		device ref pcie_rp17	on
-			register "PcieRpClkReqSupport[16]" = "1"
+			register "PcieRpClkReqSupport[16]" = "true"
 			register "PcieRpClkReqNumber[16]" = "7"
 			register "PcieRpClkSrcNumber[16]" = "7"
 		end

src/mainboard/intel/kblrvp/variants/rvp3/overridetree.cb

@@ -77,31 +77,31 @@ chip soc/intel/skylake
 		device ref cio		on  end
 		device ref pcie_rp1	on
 			# PCIE x4 -> SLOT1
-			register "PcieRpClkReqSupport[0]" = "1"
+			register "PcieRpClkReqSupport[0]" = "true"
 			register "PcieRpClkReqNumber[0]" = "2"
 			register "PcieRpClkSrcNumber[0]" = "2"
 		end
 		device ref pcie_rp5	on
 			# PCIE x1 -> SLOT2/LAN
-			register "PcieRpClkReqSupport[4]" = "1"
+			register "PcieRpClkReqSupport[4]" = "true"
 			register "PcieRpClkReqNumber[4]" = "3"
 			register "PcieRpClkSrcNumber[4]" = "3"
 		end
 		device ref pcie_rp6	on
 			# PCIE x1 -> SLOT3
-			register "PcieRpClkReqSupport[5]" = "1"
+			register "PcieRpClkReqSupport[5]" = "true"
 			register "PcieRpClkReqNumber[5]" = "1"
 			register "PcieRpClkSrcNumber[5]" = "1"
 		end
 		device ref pcie_rp9	on
 			# PCIE x1 -> WLAN
-			register "PcieRpClkReqSupport[8]" = "1"
+			register "PcieRpClkReqSupport[8]" = "true"
 			register "PcieRpClkReqNumber[8]" = "5"
 			register "PcieRpClkSrcNumber[8]" = "5"
 		end
 		device ref pcie_rp10	on
 			# PCIE x1 -> WiGig
-			register "PcieRpClkReqSupport[9]" = "1"
+			register "PcieRpClkReqSupport[9]" = "true"
 			register "PcieRpClkReqNumber[9]" = "4"
 			register "PcieRpClkSrcNumber[9]" = "4"
 		end

src/mainboard/intel/kblrvp/variants/rvp7/overridetree.cb

@@ -124,27 +124,27 @@ chip soc/intel/skylake
 			}"
 		end
 		device ref pcie_rp3	on
-			register "PcieRpClkReqSupport[2]" = "1"
+			register "PcieRpClkReqSupport[2]" = "true"
 			register "PcieRpClkReqNumber[2]" = "5"
 			register "PcieRpClkSrcNumber[2]" = "5"
 		end
 		device ref pcie_rp4	on
-			register "PcieRpClkReqSupport[3]" = "1"
+			register "PcieRpClkReqSupport[3]" = "true"
 			register "PcieRpClkReqNumber[3]" = "2"
 			register "PcieRpClkSrcNumber[3]" = "2"
 		end
 		device ref pcie_rp5	on
-			register "PcieRpClkReqSupport[4]" = "1"
+			register "PcieRpClkReqSupport[4]" = "true"
 			register "PcieRpClkReqNumber[4]" = "3"
 			register "PcieRpClkSrcNumber[4]" = "3"
 		end
 		device ref pcie_rp6	on
-			register "PcieRpClkReqSupport[5]" = "1"
+			register "PcieRpClkReqSupport[5]" = "true"
 			register "PcieRpClkReqNumber[5]" = "4"
 			register "PcieRpClkSrcNumber[5]" = "4"
 		end
 		device ref pcie_rp9	on
-			register "PcieRpClkReqSupport[8]" = "1"
+			register "PcieRpClkReqSupport[8]" = "true"
 			register "PcieRpClkReqNumber[8]" = "1"
 			register "PcieRpClkSrcNumber[8]" = "1"
 		end

src/mainboard/intel/kblrvp/variants/rvp8/overridetree.cb

@@ -148,19 +148,19 @@ chip soc/intel/skylake
 		device ref pcie_rp1	off end
 		device ref pcie_rp3	on  end
 		device ref pcie_rp4	on
-			register "PcieRpClkReqSupport[3]" = "1"
+			register "PcieRpClkReqSupport[3]" = "true"
 			register "PcieRpClkReqNumber[3]" = "2"
 		end
 		device ref pcie_rp5	on
-			register "PcieRpClkReqSupport[4]" = "1"
+			register "PcieRpClkReqSupport[4]" = "true"
 			register "PcieRpClkReqNumber[4]" = "1"
 		end
 		device ref pcie_rp9	on
-			register "PcieRpClkReqSupport[8]" = "1"
+			register "PcieRpClkReqSupport[8]" = "true"
 			register "PcieRpClkReqNumber[8]" = "6"
 		end
 		device ref pcie_rp17	on
-			register "PcieRpClkReqSupport[16]" = "1"
+			register "PcieRpClkReqSupport[16]" = "true"
 			register "PcieRpClkReqNumber[16]" = "7"
 		end
 		device ref emmc		off end

src/mainboard/intel/kunimitsu/devicetree.cb

@@ -210,7 +210,7 @@ chip soc/intel/skylake
 			end
 		end
 		device ref pcie_rp1	on
-			register "PcieRpClkReqSupport[0]" = "1"
+			register "PcieRpClkReqSupport[0]" = "true"
 			register "PcieRpClkReqNumber[0]" = "1"
 			chip drivers/wifi/generic
 				register "wake" = "GPE0_DW0_16"
@@ -218,7 +218,7 @@ chip soc/intel/skylake
 			end
 		end
 		device ref pcie_rp5	on
-			register "PcieRpClkReqSupport[4]" = "1"
+			register "PcieRpClkReqSupport[4]" = "true"
 			register "PcieRpClkReqNumber[4]" = "2"
 		end
 		device ref uart0	on end

src/mainboard/intel/saddlebrook/devicetree.cb

@@ -186,21 +186,21 @@ chip soc/intel/skylake
 		device ref i2c4		on end
 		device ref pcie_rp1	on end
 		device ref pcie_rp6	on
-			register "PcieRpClkReqSupport[5]" = "1"
+			register "PcieRpClkReqSupport[5]" = "true"
 			register "PcieRpClkReqNumber[5]" = "0"
 		end
 		device ref pcie_rp8	on
 			# x1
-			register "PcieRpClkReqSupport[7]" = "1"
+			register "PcieRpClkReqSupport[7]" = "true"
 			register "PcieRpClkReqNumber[7]" = "3"
 		end
 		device ref pcie_rp9	on
 			# x4
-			register "PcieRpClkReqSupport[8]" = "1"
+			register "PcieRpClkReqSupport[8]" = "true"
 			register "PcieRpClkReqNumber[8]" = "4"
 		end
 		device ref pcie_rp13	on
-			register "PcieRpClkReqSupport[12]" = "1"
+			register "PcieRpClkReqSupport[12]" = "true"
 			register "PcieRpClkReqNumber[12]" = "1"
 		end
 		device ref uart0	on end

src/mainboard/lenovo/sklkbl_thinkpad/variants/t480/overridetree.cb

@@ -37,7 +37,7 @@ chip soc/intel/skylake
 
 		# dGPU - x4
 		device ref pcie_rp1 on
-			register "PcieRpClkReqSupport[0]"		= "1"
+			register "PcieRpClkReqSupport[0]"		= "true"
 			register "PcieRpClkReqNumber[0]"		= "0"
 			register "PcieRpClkSrcNumber[0]"		= "0"
 			register "PcieRpAdvancedErrorReporting[0]"	= "1"
@@ -55,7 +55,7 @@ chip soc/intel/skylake
 
 		# M.2 WLAN - x1
 		device ref pcie_rp7 on
-			register "PcieRpClkReqSupport[6]"		= "1"
+			register "PcieRpClkReqSupport[6]"		= "true"
 			register "PcieRpClkReqNumber[6]"		= "2"
 			register "PcieRpClkSrcNumber[6]"		= "2"
 			register "PcieRpAdvancedErrorReporting[6]"	= "1"
@@ -64,7 +64,7 @@ chip soc/intel/skylake
 
 		# M.2 WWAN - x2
 		device ref pcie_rp5 on
-			register "PcieRpClkReqSupport[4]"		= "1"
+			register "PcieRpClkReqSupport[4]"		= "true"
 			register "PcieRpClkReqNumber[4]"		= "3"
 			register "PcieRpClkSrcNumber[4]"		= "3"
 			register "PcieRpAdvancedErrorReporting[4]"	= "1"
@@ -73,7 +73,7 @@ chip soc/intel/skylake
 
 		# TB3 (Alpine Ridge LP) - x2
 		device ref pcie_rp9 on
-			register "PcieRpClkReqSupport[8]"		= "1"
+			register "PcieRpClkReqSupport[8]"		= "true"
 			register "PcieRpClkReqNumber[8]"		= "4"
 			register "PcieRpClkSrcNumber[8]"		= "4"
 			register "PcieRpAdvancedErrorReporting[8]"	= "1"
@@ -83,7 +83,7 @@ chip soc/intel/skylake
 
 		# M.2 2280 caddy - x2
 		device ref pcie_rp11 on
-			register "PcieRpClkReqSupport[10]"		= "1"
+			register "PcieRpClkReqSupport[10]"		= "true"
 			register "PcieRpClkReqNumber[10]"		= "5"
 			register "PcieRpClkSrcNumber[10]"		= "5"
 			register "PcieRpAdvancedErrorReporting[10]"	= "1"

src/mainboard/lenovo/sklkbl_thinkpad/variants/t480s/overridetree.cb

@@ -37,7 +37,7 @@ chip soc/intel/skylake
 
 		# dGPU - x2
 		device ref pcie_rp1 on
-			register "PcieRpClkReqSupport[0]"		= "1"
+			register "PcieRpClkReqSupport[0]"		= "true"
 			register "PcieRpClkReqNumber[0]"		= "0"
 			register "PcieRpClkSrcNumber[0]"		= "0"
 			register "PcieRpAdvancedErrorReporting[0]"	= "1"
@@ -47,7 +47,7 @@ chip soc/intel/skylake
 
 		# M.2 WWAN - x1
 		device ref pcie_rp4 on
-			register "PcieRpClkReqSupport[3]"		= "1"
+			register "PcieRpClkReqSupport[3]"		= "true"
 			register "PcieRpClkReqNumber[3]"		= "1"
 			register "PcieRpClkSrcNumber[3]"		= "1"
 			register "PcieRpAdvancedErrorReporting[3]"	= "1"
@@ -64,7 +64,7 @@ chip soc/intel/skylake
 
 		# M.2 WLAN - x1
 		device ref pcie_rp7 on
-			register "PcieRpClkReqSupport[6]"		= "1"
+			register "PcieRpClkReqSupport[6]"		= "true"
 			register "PcieRpClkReqNumber[6]"		= "3"
 			register "PcieRpClkSrcNumber[6]"		= "3"
 			register "PcieRpAdvancedErrorReporting[6]"	= "1"
@@ -73,7 +73,7 @@ chip soc/intel/skylake
 
 		# TB3 (Alpine Ridge LP) - x2
 		device ref pcie_rp5 on
-			register "PcieRpClkReqSupport[4]"		= "1"
+			register "PcieRpClkReqSupport[4]"		= "true"
 			register "PcieRpClkReqNumber[4]"		= "4"
 			register "PcieRpClkSrcNumber[4]"		= "4"
 			register "PcieRpAdvancedErrorReporting[4]"	= "1"
@@ -83,7 +83,7 @@ chip soc/intel/skylake
 
 		# M.2 2280 SSD - x2
 		device ref pcie_rp9 on
-			register "PcieRpClkReqSupport[8]"		= "1"
+			register "PcieRpClkReqSupport[8]"		= "true"
 			register "PcieRpClkReqNumber[8]"		= "5"
 			register "PcieRpClkSrcNumber[8]"		= "5"
 			register "PcieRpAdvancedErrorReporting[8]"	= "1"

src/mainboard/protectli/vault_kbl/devicetree.cb

@@ -181,7 +181,7 @@ chip soc/intel/skylake
 			register "PcieRpAdvancedErrorReporting[8]" = "1"
 			register "PcieRpLtrEnable[8]" = "true"
 			register "PcieRpClkSrcNumber[8]" = "5"
-			register "PcieRpClkReqSupport[8]" = "1"
+			register "PcieRpClkReqSupport[8]" = "true"
 			register "PcieRpClkReqNumber[8]" = "0"
 			smbios_slot_desc
 				"SlotTypePciExpressMini52pinWithoutBSKO"

src/mainboard/purism/librem_skl/variants/librem15/overridetree.cb

@@ -24,7 +24,7 @@ chip soc/intel/skylake
 		end
 		device ref pcie_rp5 on  end
 		device ref pcie_rp9 on
-			register "PcieRpClkReqSupport[8]" = "0"
+			register "PcieRpClkReqSupport[8]" = "false"
 			register "PcieRpClkReqNumber[8]" = "2"
 		end
 	end

src/mainboard/starlabs/starbook/variants/kbl/devicetree.cb

@@ -88,7 +88,7 @@ chip soc/intel/skylake
 		end
 		device ref uart2	on  end
 		device ref pcie_rp6	on
-			register "PcieRpClkReqSupport[5]"	= "1"
+			register "PcieRpClkReqSupport[5]"	= "true"
 			register "PcieRpClkReqNumber[5]"	= "4"
 			register "PcieRpClkSrcNumber[5]"	= "4"
 			register "PcieRpLtrEnable[5]"		= "true"
@@ -99,7 +99,7 @@ chip soc/intel/skylake
 			end
 		end
 		device ref pcie_rp9	on
-			register "PcieRpClkReqSupport[8]"	= "1"
+			register "PcieRpClkReqSupport[8]"	= "true"
 			register "PcieRpClkReqNumber[8]"	= "0"
 			register "PcieRpClkSrcNumber[8]"	= "0"
 			register "PcieRpLtrEnable[8]"		= "true"

src/mainboard/system76/kbl-u/devicetree.cb

@@ -133,7 +133,7 @@ chip soc/intel/skylake
 		end
 		device ref pcie_rp1 on
 			# Root port #1 x4 (TBT)
-			register "PcieRpClkReqSupport[0]" = "1"
+			register "PcieRpClkReqSupport[0]" = "true"
 			register "PcieRpClkReqNumber[0]" = "4"
 			register "PcieRpClkSrcNumber[0]" = "4"
 			register "PcieRpAdvancedErrorReporting[0]" = "1"
@@ -142,7 +142,7 @@ chip soc/intel/skylake
 		end
 		device ref pcie_rp5 on
 			# Root port #5 x1 (LAN)
-			register "PcieRpClkReqSupport[4]" = "1"
+			register "PcieRpClkReqSupport[4]" = "true"
 			register "PcieRpClkReqNumber[4]" = "3"
 			register "PcieRpClkSrcNumber[4]" = "3"
 			register "PcieRpAdvancedErrorReporting[4]" = "1"
@@ -150,7 +150,7 @@ chip soc/intel/skylake
 		end
 		device ref pcie_rp6 on
 			# Root port #6 x1 (WLAN)
-			register "PcieRpClkReqSupport[5]" = "1"
+			register "PcieRpClkReqSupport[5]" = "true"
 			register "PcieRpClkReqNumber[5]" = "2"
 			register "PcieRpClkSrcNumber[5]" = "2"
 			register "PcieRpAdvancedErrorReporting[5]" = "1"
@@ -159,7 +159,7 @@ chip soc/intel/skylake
 		end
 		device ref pcie_rp9 on
 			# Root port #9 x4 (NVMe)
-			register "PcieRpClkReqSupport[8]" = "1"
+			register "PcieRpClkReqSupport[8]" = "true"
 			register "PcieRpClkReqNumber[8]" = "5"
 			register "PcieRpClkSrcNumber[8]" = "5"
 			register "PcieRpAdvancedErrorReporting[8]" = "1"