mb/google/skywalker: Correct MIPI panel power sequence

Unlike other skywalker boards, GPIO14 is EN_PP6000_MIPI_DISP instead of
TCHSCR_REPORT_DISABLE on Padme. Therefore, in bootblock that GPIO should
be initialized low to meet the MIPI panel's required power-on sequence.
More precisely, IOVCC (LCD_VDDI) must lead AVDD by >2ms [1].

Add alias GPIO_EN_PP6000_MIPI_DISP to skywalker/gpio.h, and use it
instead of GPIO_TCHSCR_REPORT_DISABLE in the MIPI initialization code.
Also remove the EN_PP6000_MIPI_DISP pull-low in mipi_panel_power_on(),
as it has been pulled low in setup_chromeos_gpios().

[1] Preliminary+specification+TL121BVMS07+-00+V01+20250721.pdf

BUG=b:451746079
TEST=Boot Padme and confirm panel power-on timing is correct.
BRANCH=skywalker

Change-Id: I748a998cde35e58eac9eb590171b79864fc58ea9
Signed-off-by: Yang Wu <wuyang5@huaqin.corp-partner.google.com>
Signed-off-by: Yu-Ping Wu <yupingso@chromium.org>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/90122
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Chen-Tsung Hsieh <chentsung@chromium.org>
Reviewed-by: Yidi Lin <yidilin@google.com>
This commit is contained in:
Yu-Ping Wu 2025-12-08 15:33:43 +08:00 committed by Yidi Lin
commit c11faad2bf
3 changed files with 8 additions and 4 deletions

View file

@ -32,7 +32,10 @@ void setup_chromeos_gpios(void)
gpio_output(GPIO_WWAN_RESET_L, 0);
gpio_output(GPIO_EN_PWR_FP, 0);
gpio_output(GPIO_EDP_BL_EN_1V8, 0);
gpio_output(GPIO_TCHSCR_REPORT_DISABLE, 1);
if (CONFIG(BOARD_GOOGLE_PADME))
gpio_output(GPIO_EN_PP6000_MIPI_DISP, 0);
else
gpio_output(GPIO_TCHSCR_REPORT_DISABLE, 1);
gpio_output(GPIO_CODEC_PWR_SOC_EN, 0);
gpio_output(GPIO_EN_PP3300_EDP_X, 0);
gpio_output(GPIO_EN_PP3300_WWAN_X, 0);

View file

@ -19,7 +19,10 @@
#define GPIO_PEN_EJECT_OD GPIO(GPIO11)
#define GPIO_EN_PWR_FP GPIO(GPIO12)
#define GPIO_EDP_BL_EN_1V8 GPIO(GPIO13)
/* For !BOARD_GOOGLE_PADME */
#define GPIO_TCHSCR_REPORT_DISABLE GPIO(GPIO14)
/* For BOARD_GOOGLE_PADME */
#define GPIO_EN_PP6000_MIPI_DISP GPIO(GPIO14)
#define GPIO_TCHSCR_INT_1V8_ODL GPIO(GPIO15)
#define GPIO_AP_WP_ODL GPIO(GPIO16)
#define GPIO_EC_AP_DPOC_EN_ODL GPIO(GPIO17)

View file

@ -44,10 +44,8 @@ void mipi_panel_power_on(void)
{
struct aw37503_config config = {
.i2c_bus = PMIC_I2C_BUS,
.en = GPIO_TCHSCR_REPORT_DISABLE,
.en = GPIO_EN_PP6000_MIPI_DISP,
};
gpio_output(config.en, 0);
mdelay(1);
mainboard_set_regulator_voltage(MTK_REGULATOR_VCN18, 1800000);
mtk_i2c_bus_init(config.i2c_bus, I2C_SPEED_FAST);