mb/nissa/var/meliks: Choose active storage by using FW_CONFIG
Select UFS or eMMC as the active storage of meliks boards by using `STORAGE` field in `FW_CONFIG`. BUG=none BRANCH=nissa TEST=FW_NAME=meliks emerge-nissa coreboot Change-Id: Ifcc917ad1231fa68ce4caf6f0d67fa75b16a3085 Signed-off-by: Seunghwan Kim <sh_.kim@samsung.corp-partner.google.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/86980 Reviewed-by: Kapil Porwal <kapilporwal@google.com> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
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3 changed files with 53 additions and 1 deletions
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@ -3,4 +3,5 @@ bootblock-y += gpio.c
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romstage-y += memory.c
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ramstage-$(CONFIG_FW_CONFIG) += fw_config.c
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ramstage-y += gpio.c
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46
src/mainboard/google/brya/variants/meliks/fw_config.c
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46
src/mainboard/google/brya/variants/meliks/fw_config.c
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@ -0,0 +1,46 @@
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/* SPDX-License-Identifier: GPL-2.0-or-later */
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#include <baseboard/gpio.h>
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#include <baseboard/variants.h>
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#include <console/console.h>
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#include <fw_config.h>
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static const struct pad_config emmc_disable_pads[] = {
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/* I7 : EMMC_CMD */
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PAD_NC(GPP_I7, NONE),
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/* I8 : EMMC_D0 */
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PAD_NC(GPP_I8, NONE),
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/* I9 : EMMC_D1 */
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PAD_NC(GPP_I9, NONE),
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/* I10 : EMMC_D2 */
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PAD_NC(GPP_I10, NONE),
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/* I11 : EMMC_D3 */
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PAD_NC(GPP_I11, NONE),
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/* I12 : EMMC_D4 */
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PAD_NC(GPP_I12, NONE),
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/* I13 : EMMC_D5 */
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PAD_NC(GPP_I13, NONE),
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/* I14 : EMMC_D6 */
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PAD_NC(GPP_I14, NONE),
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/* I15 : EMMC_D7 */
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PAD_NC(GPP_I15, NONE),
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/* I16 : EMMC_RCLK */
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PAD_NC(GPP_I16, NONE),
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/* I17 : EMMC_CLK */
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PAD_NC(GPP_I17, NONE),
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/* I18 : EMMC_RST_L */
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PAD_NC(GPP_I18, NONE),
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};
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void fw_config_gpio_padbased_override(struct pad_config *padbased_table)
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{
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// Check if FW_CONFIG is provisioned
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if (!fw_config_is_provisioned())
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return;
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if (!fw_config_probe(FW_CONFIG(STORAGE, STORAGE_EMMC))) {
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printk(BIOS_INFO, "Disable eMMC SSD GPIO pins.\n");
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gpio_padbased_override(padbased_table, emmc_disable_pads,
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ARRAY_SIZE(emmc_disable_pads));
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}
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}
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@ -392,13 +392,18 @@ chip soc/intel/alderlake
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end
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device ref pcie_rp7 off end
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device ref pcie_rp9 off end
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device ref emmc on
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probe STORAGE STORAGE_EMMC
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end
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device ref ish on
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chip drivers/intel/ish
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register "add_acpi_dma_property" = "true"
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device generic 0 on end
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end
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end
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device ref ufs on end
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device ref ufs on
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probe STORAGE STORAGE_UFS
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end
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device ref pch_espi on
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chip ec/google/chromeec
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use conn0 as mux_conn[0]
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