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libpayload: Fix coreboot table area for ARM boards

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BUG=chrome-os-partner:18637
BRANCH=none
TEST=boot on Snow, see depthcharge boot the system

Change-Id: I1f9e3ff795caa7f881ca4e9975258395ef6fee50
Signed-off-by: Stefan Reinauer <reinauer@google.com>
Reviewed-on: https://gerrit.chromium.org/gerrit/62189
Reviewed-by: David Hendricks <dhendrix@chromium.org>
Commit-Queue: Stefan Reinauer <reinauer@chromium.org>
Tested-by: Stefan Reinauer <reinauer@chromium.org>
This commit is contained in:
Stefan Reinauer 2013-07-16 11:39:58 -07:00 • committed by ChromeBot
commit c08ceca085
3 changed files with 6 additions and 6 deletions
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4
payloads/libpayload/configs/config.daisy
View file

@ -19,8 +19,8 @@ CONFIG_ARCH_ARMV7=y
# CONFIG_ARCH_POWERPC is not set
# CONFIG_ARCH_X86 is not set
# CONFIG_MEMMAP_RAM_ONLY is not set
CONFIG_COREBOOT_INFO_RANGE_BASE=0xbc000000
CONFIG_COREBOOT_INFO_RANGE_SIZE=0x04000000
CONFIG_COREBOOT_INFO_RANGE_BASE=0xbfb00000
CONFIG_COREBOOT_INFO_RANGE_SIZE=0x00100000
#
# Standard Libraries

4
payloads/libpayload/configs/config.peach_kirby
View file

@ -19,8 +19,8 @@ CONFIG_ARCH_ARMV7=y
# CONFIG_ARCH_POWERPC is not set
# CONFIG_ARCH_X86 is not set
# CONFIG_MEMMAP_RAM_ONLY is not set
CONFIG_COREBOOT_INFO_RANGE_BASE=0x9c000000
CONFIG_COREBOOT_INFO_RANGE_SIZE=0x04000000
CONFIG_COREBOOT_INFO_RANGE_BASE=0x9fb00000
CONFIG_COREBOOT_INFO_RANGE_SIZE=0x00100000
#
# Standard Libraries

4
payloads/libpayload/configs/config.peach_pit
View file

@ -19,8 +19,8 @@ CONFIG_ARCH_ARMV7=y
# CONFIG_ARCH_POWERPC is not set
# CONFIG_ARCH_X86 is not set
# CONFIG_MEMMAP_RAM_ONLY is not set
CONFIG_COREBOOT_INFO_RANGE_BASE=0x9c000000
CONFIG_COREBOOT_INFO_RANGE_SIZE=0x04000000
CONFIG_COREBOOT_INFO_RANGE_BASE=0x9fb00000
CONFIG_COREBOOT_INFO_RANGE_SIZE=0x00100000
#
# Standard Libraries