From c069dc3eb17db88a6fb60da7aedf91d0eb2ce404 Mon Sep 17 00:00:00 2001 From: Luca Lai Date: Tue, 24 Feb 2026 16:08:13 +0800 Subject: [PATCH] mb/google/fatcat/var/ruby: Add settings for resolving EE noise MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit Because of EE noise issue, so add acoustic mitigation items. Acoustic Noise Mitigation → Enable Slow Slew Rate for IAcore Domain → Slow Slew Rate for GT Domain → Slow Slew Rate for Ecore Domain → IAcore Disable Fast Package C-state ramp → True GT Disable Fast Package C-state ramp → True Ecore Disable Fast Package C-state ramp → True P-Core Hysteresis → <3> E-Core Hysteresis → <3> BUG=b:479695733 TEST=Build and boot to OS, check EE noise are resolved. Change-Id: I5d96cb3e87e9e5a2260b278746b7fce72be4fb59 Signed-off-by: Luca Lai Reviewed-on: https://review.coreboot.org/c/coreboot/+/91412 Reviewed-by: Subrata Banik Tested-by: build bot (Jenkins) --- .../google/fatcat/variants/ruby/overridetree.cb | 14 ++++++++++++++ 1 file changed, 14 insertions(+) diff --git a/src/mainboard/google/fatcat/variants/ruby/overridetree.cb b/src/mainboard/google/fatcat/variants/ruby/overridetree.cb index 1c1399dc21..6b37f24a0f 100644 --- a/src/mainboard/google/fatcat/variants/ruby/overridetree.cb +++ b/src/mainboard/google/fatcat/variants/ruby/overridetree.cb @@ -73,6 +73,20 @@ chip soc/intel/pantherlake [VR_DOMAIN_SA] = 38 * 4 }" + # Acoustic Noise settings and slew rate configuration: + register "enable_acoustic_noise_mitigation" = "true" + # Slew rate for IA Domain: Fast/4 + register "slow_slew_rate_config[VR_DOMAIN_IA]" = "SLEW_FAST_4" + # Slew rate for GT Domain: Fast/2 + register "slow_slew_rate_config[VR_DOMAIN_GT]" = "SLEW_FAST_2" + # Slew rate for ATOM Domain: Fast/4 + register "slow_slew_rate_config[VR_DOMAIN_ATOM]" = "SLEW_FAST_4" + register "disable_fast_pkgc_ramp[VR_DOMAIN_IA]" = "true" + register "disable_fast_pkgc_ramp[VR_DOMAIN_GT]" = "true" + register "disable_fast_pkgc_ramp[VR_DOMAIN_ATOM]" = "true" + register "pcore_hysteresis_window_ms" = "3" + register "ecore_hysteresis_window_ms" = "3" + register "usb2_ports[0]" = "USB2_PORT_TYPE_C(OC_SKIP)" # USB2_C0 register "usb2_ports[1]" = "USB2_PORT_TYPE_C(OC_SKIP)" # USB2_C1 register "usb2_ports[2]" = "USB2_PORT_MID(OC_SKIP)" # USB HUB (USB2 Camera)