UPSTREAM: src/cpu: Capitalize CPU

BUG=None
BRANCH=None
TEST=None

Change-Id: I79c41eac77636fb0c167faf514f2a9662d33f1a0
Signed-off-by: Elyes HAOUAS <ehaouas@noos.fr>
Reviewed-on: https://review.coreboot.org/15934
Tested-by: build bot (Jenkins)
Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net>
Reviewed-by: Martin Roth <martinroth@google.com>
Reviewed-on: https://chromium-review.googlesource.com/366264
Commit-Ready: Furquan Shaikh <furquan@chromium.org>
Tested-by: Furquan Shaikh <furquan@chromium.org>
Reviewed-by: Furquan Shaikh <furquan@chromium.org>
This commit is contained in:
Elyes HAOUAS 2016-07-28 18:58:27 +02:00 committed by chrome-bot
commit c052bd5e17
54 changed files with 102 additions and 102 deletions

View file

@ -57,7 +57,7 @@ static void model_10_init(device_t dev)
enable_cache();
/* Enable the local cpu apics */
/* Enable the local CPU apics */
setup_lapic();
/* Set the processor name string */

View file

@ -62,7 +62,7 @@ static void model_12_init(device_t dev)
enable_cache();
/* Enable the local cpu apics */
/* Enable the local CPU apics */
setup_lapic();
/* Set the processor name string */

View file

@ -82,7 +82,7 @@ static void model_14_init(device_t dev)
wrmsr(MCI_STATUS + (i * 4), msr);
}
/* Enable the local cpu apics */
/* Enable the local CPU apics */
setup_lapic();
#if IS_ENABLED(CONFIG_LOGICAL_CPUS)

View file

@ -67,7 +67,7 @@ static void model_15_init(device_t dev)
wrmsr(MCI_STATUS + (i * 4), msr);
}
/* Enable the local cpu apics */
/* Enable the local CPU apics */
setup_lapic();
#if IS_ENABLED(CONFIG_LOGICAL_CPUS)

View file

@ -81,7 +81,7 @@ static void model_15_init(device_t dev)
wrmsr(MCI_STATUS + (i * 4), msr);
}
/* Enable the local cpu apics */
/* Enable the local CPU apics */
setup_lapic();
#if IS_ENABLED(CONFIG_LOGICAL_CPUS)

View file

@ -80,7 +80,7 @@ static void model_15_init(device_t dev)
wrmsr(MCI_STATUS + (i * 4), msr);
}
/* Enable the local cpu apics */
/* Enable the local CPU apics */
setup_lapic();
#if IS_ENABLED(CONFIG_LOGICAL_CPUS)

View file

@ -79,7 +79,7 @@ static void model_16_init(device_t dev)
}
/* Enable the local cpu apics */
/* Enable the local CPU apics */
setup_lapic();
#if IS_ENABLED(CONFIG_LOGICAL_CPUS)

View file

@ -257,7 +257,7 @@ uint32_t wait_cpu_state(uint32_t apicid, uint32_t state, uint32_t state2)
continue;
if ((readback & 0x3f) == state || (readback & 0x3f) == state2 || (readback & 0x3f) == F10_APSTATE_RESET) {
timeout = 0;
break; //target cpu is in stage started
break; //target CPU is in stage started
}
}
if (timeout) {

View file

@ -133,7 +133,7 @@ static void model_10xxx_init(device_t dev)
enable_cache();
/* Enable the local cpu apics */
/* Enable the local CPU apics */
setup_lapic();
/* Set the processor name string */

View file

@ -22,7 +22,7 @@ static void geode_gx2_init(device_t dev)
/* Turn on caching if we haven't already */
x86_enable_cache();
/* Enable the local cpu apics */
/* Enable the local CPU apics */
//setup_lapic();
vsm_end_post_smi();

View file

@ -75,7 +75,7 @@ static void disablememoryreadorder(void)
wrmsr(MC_CF8F_DATA, msr);
}
/* For cpu version C3. Should be the only released version */
/* For CPU version C3. Should be the only released version */
void cpubug(void)
{
pcideadlock();

View file

@ -40,7 +40,7 @@ static void geode_lx_init(device_t dev)
/* Turn on caching if we haven't already */
x86_enable_cache();
/* Enable the local cpu apics */
/* Enable the local CPU apics */
//setup_lapic();
// do VSA late init

View file

@ -401,7 +401,7 @@ static void init_fidvid_ap(unsigned bsp_apicid, unsigned apicid)
0)
continue;
if (((readback >> 24) & 0xff) == apicid)
break; /* it is this cpu turn */
break; /* it is this CPU turn */
}
if (loop > 0) {

View file

@ -157,7 +157,7 @@ static u32 wait_cpu_state(u32 apicid, u32 state)
continue;
if ((readback & 0xff) == state) {
timeout = 0;
break; //target cpu is in stage started
break; //target CPU is in stage started
}
}
if (timeout) {
@ -303,7 +303,7 @@ static u32 init_cpus(u32 cpu_init_detectedx)
// start_other_core(id.nodeid); // start second core in first cpu, only allowed for nb_cfg_54 is not set
}
//here don't need to wait
lapic_write(LAPIC_MSG_REG, (apicid << 24) | 0x33); // mark the cpu is started
lapic_write(LAPIC_MSG_REG, (apicid << 24) | 0x33); // mark the CPU is started
if (apicid != bsp_apicid) {
u32 timeout = 1;

View file

@ -249,15 +249,15 @@ static void init_ecc_memory(unsigned node_id)
f1_dev = dev_find_slot(0, PCI_DEVFN(0x18 + node_id, 1));
if (!f1_dev) {
die("Cannot find cpu function 1\n");
die("Cannot find CPU function 1\n");
}
f2_dev = dev_find_slot(0, PCI_DEVFN(0x18 + node_id, 2));
if (!f2_dev) {
die("Cannot find cpu function 2\n");
die("Cannot find CPU function 2\n");
}
f3_dev = dev_find_slot(0, PCI_DEVFN(0x18 + node_id, 3));
if (!f3_dev) {
die("Cannot find cpu function 3\n");
die("Cannot find CPU function 3\n");
}
/* See if we scrubbing should be enabled */
@ -508,7 +508,7 @@ static void model_fxx_init(device_t dev)
/* Set the processor name string */
init_processor_name();
/* Enable the local cpu apics */
/* Enable the local CPU apics */
setup_lapic();
#if CONFIG_LOGICAL_CPUS

View file

@ -79,7 +79,7 @@ static void model_15_init(device_t dev)
}
/* Enable the local cpu apics */
/* Enable the local CPU apics */
setup_lapic();
#if CONFIG_LOGICAL_CPUS

View file

@ -94,7 +94,7 @@ static void model_15_init(device_t dev)
}
/* Enable the local cpu apics */
/* Enable the local CPU apics */
setup_lapic();
#if CONFIG_LOGICAL_CPUS

View file

@ -77,7 +77,7 @@ static void model_16_init(device_t dev)
}
/* Enable the local cpu apics */
/* Enable the local CPU apics */
setup_lapic();
#if CONFIG_LOGICAL_CPUS