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mb/google/ocelot: Add VR_DOMAIN_IA for fast_vmode_i_trip

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Extend fast voltage mode configuration to IA Domain

Ref=830097_WCL_PDG_SchChk_Rev1p5
BUG=b:None
TEST=Build ocelot and verify that the system boots with following
VR parameter
[SPEW ]   IccMaxItrip[0] = 152

Change-Id: Iced5cea1bed8f215602ac1455ded214fa1f72c72
Signed-off-by: Sowmya Aralguppe <sowmya.aralguppe@intel.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/91450
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Matt DeVillier <matt.devillier@gmail.com>
This commit is contained in:
Sowmya Aralguppe 2026-02-27 13:33:14 +05:30 • committed by Matt DeVillier
commit bf6b14e4f7
1 changed files with 4 additions and 3 deletions
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7
src/mainboard/google/ocelot/variants/baseboard/ocelot/devicetree.cb
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@ -67,13 +67,14 @@ chip soc/intel/pantherlake
# Enable Energy Reporting
register "pch_pm_energy_report_enable" = "true"
# Reference: 844458 MOW WW03
# Reference: 844458 MOW WW03, 8300097
# fast_vmode_i_trip values are derived from ICCMax with a safety margin.
# ITRIP_NOM is approximately 0.70 of ICCMax
# TODO: Update with actual i_trip values.
register "enable_fast_vmode[VR_DOMAIN_IA]" = "true"
register "cep_enable[VR_DOMAIN_IA]" = "true"
register "enable_fast_vmode[VR_DOMAIN_GT]" = "true"
register "cep_enable[VR_DOMAIN_GT]" = "true"
register "fast_vmode_i_trip[WCL_SKU_1]" = "{
[VR_DOMAIN_IA] = 38 * 4,
[VR_DOMAIN_GT] = 25 * 4,
}"