From bf044a940235bc507c51c47ee32c3107eff33798 Mon Sep 17 00:00:00 2001 From: Sean Rhodes Date: Mon, 2 Feb 2026 20:30:59 +0000 Subject: [PATCH] soc/intel/meteorlake: add ARL-H 45W power entry configure_tdp() selects the power limit table based on the SA PCI device ID and the CPU's nominal TDP. Add a 45W entry for PCI_DID_INTEL_ARL_H_ID_1 (e.g. Intel 285H) so power limits are programmed instead of being skipped. Change-Id: Ia90633b43b78bc616ff0b750ed3ef44333019957 Signed-off-by: Sean Rhodes Reviewed-on: https://review.coreboot.org/c/coreboot/+/91056 Reviewed-by: Matt DeVillier Tested-by: build bot (Jenkins) --- src/soc/intel/meteorlake/chip.h | 4 +++- 1 file changed, 3 insertions(+), 1 deletion(-) diff --git a/src/soc/intel/meteorlake/chip.h b/src/soc/intel/meteorlake/chip.h index 7c4c954d26..c32bb74ade 100644 --- a/src/soc/intel/meteorlake/chip.h +++ b/src/soc/intel/meteorlake/chip.h @@ -52,7 +52,8 @@ enum soc_intel_meteorlake_power_limits { /* TDP values for different SKUs */ enum soc_intel_meteorlake_cpu_tdps { TDP_15W = 15, - TDP_28W = 28 + TDP_28W = 28, + TDP_45W = 45, }; /* Mapping of different SKUs based on CPU ID and TDP values */ @@ -66,6 +67,7 @@ static const struct { { PCI_DID_INTEL_MTL_P_ID_3, MTL_P_682_482_CORE, TDP_28W }, { PCI_DID_INTEL_MTL_P_ID_1, MTL_P_682_482_CORE, TDP_28W }, { PCI_DID_INTEL_ARL_H_ID_1, MTL_P_682_482_CORE, TDP_28W }, + { PCI_DID_INTEL_ARL_H_ID_1, MTL_P_682_482_CORE, TDP_45W }, { PCI_DID_INTEL_ARL_H_ID_2, MTL_P_682_482_CORE, TDP_28W }, };