From bef083378b9cdf629135491c3347ebf6c2a7be59 Mon Sep 17 00:00:00 2001 From: Martin Roth Date: Fri, 7 Oct 2016 10:48:31 -0600 Subject: [PATCH] UPSTREAM: google/reef/variants/pyro: Add support for GPIO output polarity commit 028200f7 - x86/acpi_device: Add support for GPIO output polarity updated ACPI_GPIO_OUTPUT to ACPI_GPIO_OUTPUT_ACTIVE_HIGH for the other boards that needed it, but pyro wasn't in the tree when it was initially pushed. Now that pyro is in the tree, it needs to be updated as well. BUG=None BRANCH=None TEST=None Signed-off-by: Martin Roth Reviewed-on: https://review.coreboot.org/16930 Reviewed-by: Stefan Reinauer Reviewed-by: Furquan Shaikh Reviewed-by: Paul Menzel Tested-by: build bot (Jenkins) Change-Id: I617999b06ee584e0543d7ae3232bb2be2ff7429c Reviewed-on: https://chromium-review.googlesource.com/396164 Commit-Ready: Furquan Shaikh Tested-by: Furquan Shaikh Reviewed-by: Aaron Durbin --- src/mainboard/google/reef/variants/pyro/devicetree.cb | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/src/mainboard/google/reef/variants/pyro/devicetree.cb b/src/mainboard/google/reef/variants/pyro/devicetree.cb index 087f85845e..43ec2ed054 100644 --- a/src/mainboard/google/reef/variants/pyro/devicetree.cb +++ b/src/mainboard/google/reef/variants/pyro/devicetree.cb @@ -84,7 +84,7 @@ chip soc/intel/apollolake device pci 0d.3 on end # - Shared SRAM device pci 0e.0 on # - Audio chip drivers/generic/max98357a - register "sdmode_gpio" = "ACPI_GPIO_OUTPUT(GPIO_76)" + register "sdmode_gpio" = "ACPI_GPIO_OUTPUT_ACTIVE_HIGH(GPIO_76)" device generic 0 on end end end