From beafbfd29ae09b8fc7a10545de9927bd998fba4f Mon Sep 17 00:00:00 2001 From: Jeremy Compostella Date: Tue, 3 Jun 2025 20:10:48 -0700 Subject: [PATCH] soc/intel/pantherlake: Remove IOE support and references Panther Lake H and U variants do not include any IOE die, making IOE support unnecessary. This commit removes references to IOE support across the Panther Lake SoC configuration and related files, simplifying the codebase and avoiding potential misconfigurations. These changes reduce unnecessary complexity and potential confusion regarding IOE functionality in Panther Lake H and U SoCs, ensuring configurations accurately reflect hardware capabilities. BUG=b:422284273 Change-Id: I0ede4e1157c473763d53a9a3e6ab913ab470dc42 Signed-off-by: Jeremy Compostella Reviewed-on: https://review.coreboot.org/c/coreboot/+/87933 Reviewed-by: Subrata Banik Reviewed-by: Wonkyu Kim Reviewed-by: Kapil Porwal Tested-by: build bot (Jenkins) --- src/soc/intel/pantherlake/Kconfig | 1 - src/soc/intel/pantherlake/acpi/southbridge.asl | 2 -- src/soc/intel/pantherlake/include/soc/iomap.h | 2 -- src/soc/intel/pantherlake/include/soc/pci_devs.h | 1 - src/soc/intel/pantherlake/p2sb.c | 2 +- src/soc/intel/pantherlake/tcss.c | 12 ++++++------ 6 files changed, 7 insertions(+), 13 deletions(-) diff --git a/src/soc/intel/pantherlake/Kconfig b/src/soc/intel/pantherlake/Kconfig index 089e8a7c34..03865b2ddf 100644 --- a/src/soc/intel/pantherlake/Kconfig +++ b/src/soc/intel/pantherlake/Kconfig @@ -98,7 +98,6 @@ config SOC_INTEL_PANTHERLAKE_BASE select SOC_INTEL_CSE_SEND_EOP_LATE if !MAINBOARD_HAS_CHROMEOS select SOC_INTEL_CSE_SET_EOP select SOC_INTEL_GFX_NON_PREFETCHABLE_MMIO - select SOC_INTEL_IOE_DIE_SUPPORT select SOC_INTEL_MEM_MAPPED_PM_CONFIGURATION select SOC_QDF_DYNAMIC_READ_PMC select SSE2 diff --git a/src/soc/intel/pantherlake/acpi/southbridge.asl b/src/soc/intel/pantherlake/acpi/southbridge.asl index 20e23122fb..bf30363b0f 100644 --- a/src/soc/intel/pantherlake/acpi/southbridge.asl +++ b/src/soc/intel/pantherlake/acpi/southbridge.asl @@ -6,8 +6,6 @@ /* PCR access */ #include -/* IOE PCR access */ -#include /* PCIE src clock control */ #include diff --git a/src/soc/intel/pantherlake/include/soc/iomap.h b/src/soc/intel/pantherlake/include/soc/iomap.h index fac9c03f1c..fce3140544 100644 --- a/src/soc/intel/pantherlake/include/soc/iomap.h +++ b/src/soc/intel/pantherlake/include/soc/iomap.h @@ -74,8 +74,6 @@ /* PCH P2SB2 256MB */ #define P2SB2_BAR CONFIG_P2SB_2_PCR_BASE_ADDRESS #define P2SB2_SIZE (256 * MiB) -#define IOE_P2SB_BAR P2SB2_BAR -#define IOE_P2SB_SIZE P2SB2_SIZE /* IOM_BASE_ADDR = ((long int) Ps2bMmioBase | (int) (((Offset) & 0x0F0000) << 8) \ * | ((unsigned char)(Pid) << 16) | (short int) ((Offset) & 0xFFFF)) diff --git a/src/soc/intel/pantherlake/include/soc/pci_devs.h b/src/soc/intel/pantherlake/include/soc/pci_devs.h index dc7130cbb5..7dc55e1045 100644 --- a/src/soc/intel/pantherlake/include/soc/pci_devs.h +++ b/src/soc/intel/pantherlake/include/soc/pci_devs.h @@ -247,7 +247,6 @@ #define PCH_DEV_SPI PCI_DEV_SPI #define PCH_DEV_LPC PCI_DEV_ESPI #define PCH_DEV_P2SB PCI_DEV_P2SB -#define PCI_DEV_IOE_P2SB PCI_DEV_P2SB2 #define PCH_DEV_SMBUS PCI_DEV_SMBUS #define PCH_DEV_XHCI PCI_DEV_XHCI #define PCH_DEVFN_XHCI PCI_DEVFN_XHCI diff --git a/src/soc/intel/pantherlake/p2sb.c b/src/soc/intel/pantherlake/p2sb.c index 52b36903d6..6915463937 100644 --- a/src/soc/intel/pantherlake/p2sb.c +++ b/src/soc/intel/pantherlake/p2sb.c @@ -35,7 +35,7 @@ void p2sb_soc_get_sb_mask(uint32_t *ep_mask, size_t count) static void p2sb2_read_resources(struct device *dev) { /* Add the fixed MMIO resource for P2SB#2 */ - mmio_range(dev, PCI_BASE_ADDRESS_0, IOE_P2SB_BAR, IOE_P2SB_SIZE); + mmio_range(dev, PCI_BASE_ADDRESS_0, P2SB2_BAR, P2SB2_SIZE); } static void p2sb_read_resources(struct device *dev) diff --git a/src/soc/intel/pantherlake/tcss.c b/src/soc/intel/pantherlake/tcss.c index c66a5c68ce..1b7a34acc9 100644 --- a/src/soc/intel/pantherlake/tcss.c +++ b/src/soc/intel/pantherlake/tcss.c @@ -4,13 +4,13 @@ #include #include -const struct soc_tcss_ops tcss_ops = { - .configure_aux_bias_pads = NULL, - .valid_tbt_auth = ioe_tcss_valid_tbt_auth, -}; - -bool ioe_tcss_valid_tbt_auth(void) +static bool soc_tcss_valid_tbt_auth(void) { const config_t *config = config_of_soc(); return config->tbt_authentication; } + +const struct soc_tcss_ops tcss_ops = { + .configure_aux_bias_pads = NULL, + .valid_tbt_auth = soc_tcss_valid_tbt_auth, +};